A1242LLHLT-I2-T Allegro Microsystems Inc, A1242LLHLT-I2-T Datasheet - Page 9
![IC LATCH HALL EFFECT SOT-23W](/photos/19/49/194943/620-sot-23w_sml.jpg)
A1242LLHLT-I2-T
Manufacturer Part Number
A1242LLHLT-I2-T
Description
IC LATCH HALL EFFECT SOT-23W
Manufacturer
Allegro Microsystems Inc
Type
Unipolar Switchr
Datasheet
1.A1242ELHLT-I1-T.pdf
(12 pages)
Specifications of A1242LLHLT-I2-T
Package / Case
SOT-23W
Sensing Range
80G Trip, -80G Release
Voltage - Supply
3.5 V ~ 24 V
Current - Supply
6.9mA
Output Type
Digital, Open Drain
Features
Regulated Voltage
Operating Temperature
-40°C ~ 150°C
Peak Reflow Compatible (260 C)
Yes
Termination Type
SMD
Supply Voltage Max
24V
No. Of Pins
3
Hall Effect Type
Latching
Supply Voltage Min
3.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
A1242
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall element. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges.
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. The patented Allegro technique, namely
Dynamic Quadrature Offset Cancellation, removes key sources
of the output drift induced by thermal and mechanical stresses.
This offset reduction technique is based on a signal modulation-
demodulation process. The undesired offset signal is separated
from the magnetic field-induced signal in the frequency domain,
through modulation. The subsequent demodulation acts as a
modulation process for the offset, causing the magnetic field
induced signal to recover its original spectrum at baseband,
while the DC offset becomes a high-frequency signal. The
magnetic sourced signal then can pass through a low-pass filter,
while the modulated DC offset is suppressed. This configuration
is illustrated in Figure 3.
The chopper stabilization technique uses a 200 kHz high
frequency clock. For demodulation process, a sample and hold
Hall Element
Figure 3. Chopper stabilization circuit (dynamic quadrature offset cancellation)
Two-Wire Chopper-Stabilized Hall Effect Latch
Regulator
technique is used, where the sampling is performed at twice the
chopper frequency (400 kHz). This high-frequency operation
allows a greater sampling rate, which results in higher accuracy
and faster signal-processing capability. This approach desensi-
tizes the chip to the effects of thermal and mechanical stresses,
and produces devices that have extremely stable quiescent Hall
output voltages and precise recoverability after temperature
cycling. This technique is made possible through the use of a
BiCMOS process, which allows the use of low-offset, low-noise
amplifiers in combination with high-density logic integration
and sample-and-hold circuits.
The repeatability of magnetic field-induced switching is affected
slightly by a chopper technique. However, the Allegro high
frequency chopping approach minimizes the affect of jitter and
makes it imperceptible in most applications. Applications that
are more likely to be sensitive to such degradation are those
requiring precise sensing of alternating magnetic fields; for
example, speed sensing of ring-magnet targets. For such applica-
tions,
Allegro recommends its digital device families with lower sen-
sitivity to jitter. For more information on those devices, contact
your Allegro sales representative.
Clock/Logic
Amp
Low-Pass
Filter
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
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