H7AN-4D-AC100-240 Omron, H7AN-4D-AC100-240 Datasheet - Page 8

• Manufacturer Part Number: H7AN-4D-AC100-240
• Description: COUNTER DIGITAL LED
• Manufacturer: Omron

Specifications of H7AN-4D-AC100-240

• Rohs Compliant: YES
• Digit Height: 72mm
• Supply Voltage Range: 100VAC To 240VAC
• Counting Speed: 30Hz
• Operating Temperature Range: -10°C To +55°C
• No. Of Digits / Alpha: 4
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reversible Mode
Note: 1. A: Minimum signal width; B: Must be at least 1/2 of minimum signal width. An error of ±1 count may occur if the width of (A) and (B) are
■ Output Modes
Note: 1. In the C, K, P, and Q modes, the counters must not count out again while the one-shot timer is working.
N
Incrementing/Decrementing A command input mode
Incrementing/Decrementing B individual input mode
Incrementing/Decrementing C phase difference input mode
Output
mode
2. Set the same counting speed for CP1 and CP2 when in Up/Down C, or F mode.
2. In the C mode, the present value is placed in reset start status as soon as the preset count is reached and the count-out status is not
CP1
CP2
Count
CP1
CP2
CP1
CP2
Count
Count
smaller than the minimum signal width.
displayed.
0
0
H
L
H
L
Display 1st
0
H
L
H
L
H
L
H
L
2nd output
1st output
0
0
Reset
Incrementing, Incrementing/Decrementing A, B, C
B B B B
2nd
0
0
1
1
Incrementing, decrementing, or reversible
1
Incrementing mode
2
2
Self-holding output
2
3
3
3
2
2
(A)
2
1
1
1
1
(A)
2
2
2
Self-holding output
One-shot 1st output (0.5 s, fixed)
3
3
3
Incrementing/Decrementing D command input mode
Incrementing/Decrementing E individual input mode
Incrementing/Decrementing F phase difference input mode
One-shot 2nd output (0.1 to 1 s, variable)
Display 1st
2nd output
1st output
CP1
CP2
CP1
CP2
CP1
CP2
Count
Count
Count
Reset
0
Decrementing, Incrementing/Decrementing D, E, F
0
H
L
H
L
H
L
H
L
0
H
L
H
L
2nd
0
n
0
n
0
B B B B
n − 1
n
n − 1
Only CP2 is effective for
1-stage digital counters.
n − 1
n − 2
n − 2
Decrementing mode
n − 2
n − 3
n − 3
n − 3
n − 2
n − 2
n − 2
(A)
(A)
n − 1 n − 1
n − 1
n − 1
n − 2
n − 2
n − 2
(A)
n − 3
n − 3
n − 3
H7AN
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