BTEP-F570VGA-C-TP BATRON, BTEP-F570VGA-C-TP Datasheet - Page 20

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BTEP-F570VGA-C-TP

Manufacturer Part Number
BTEP-F570VGA-C-TP
Description
DISP 5.7" TFT LCD DEV KIT
Manufacturer
BATRON
Datasheet

Specifications of BTEP-F570VGA-C-TP

Lcd Display Type
TFT
Interface Type
RS232, USB
Viewing Area (h X W)
88mm X 117mm
Svhc
No SVHC (15-Dec-2010)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8-5. Input Timing Characteristics
Data Enable signal
(ENAB)
Horizontal sync.
(Hsync)
Clock signal(CK)
Data signal
(R0~R5,G0~G5,
Vertical sync.
Signal(Vsync)
Data signal
(R0~R5,G0~G5,
8-4. Input Data Signals and Display position on the screen
Horizontal sync.
Signal
(Hsync)
B0~B5)
B0~B5)
D1,DH480 D2,DH480 D3,DH480
D1,DH480 D2,DH480 D3,DH480
D1,DH2
D1,DH2
D1,DH1
D1,DH1
*1 When ENAB is fixed “Low” the display starts from the data of C104(Clock)
*2 The vertical display position(TVs) is fixed at 34
Horizontal invalid period
0.3VDD
TVh
0.7VDD
D2,DH1
D2,DH1
D2,DH2
D2,DH2
THp
0.3VDD
Vertical invalid data period
1line
0.7VDD
0.3VDD
TVp
0.7VDD
THc
2line
D3,DH1
D3,DH1
D3,DH2
D3,DH2
0.3VDD
…………………………………
TVs
C1
The
Data Modul AG - www.data-modul.com
R G B
R G B
0.7VDD
0.3VDD
・・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・・
C2
…………
0.3VDD
TH
0.7VDD
D1
th
0.7VDD
0.7VDD
Nline
CN
line.
Tes
*1
*
Tch
Tds
D2
Tc
0.7VDD
DH1
Tcl
Tdh
TV
THd
Tep
0.3VDD
0.7VDD
DH2
D640,DH1
D640,DH1
TVd
D640
DH480
水平データ数
0.3VDD
Horizontal invalid data period
Vertical invalid data period
0.3VDD
0.3VDD
19

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