ADNS-7700-HCMY Avago Technologies US Inc., ADNS-7700-HCMY Datasheet - Page 49

• Manufacturer Part Number: ADNS-7700-HCMY
• Description: USB SoC Lsr Snsr 5B+OTF+LED_T
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-7700-HCMY

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LSR_CTRL1
Access: Read/Write
Data Type: Bit field
USAGE: This register is included strictly for test purposes only. It is to be used with LSR_CTRL1 register, 0x76 where
INV_REV_ID
Access: Read only
Data Type: 8-bit number with current revision of the IC.
USAGE: Contains the inverse of the revision ID which is located in register 0x01.
L2_USE_OTP
Access: Read/Write
Data Type: 8-bit field.
USAGE: Bypass OTP configuration if all bits are zero. MUST write 0xFF to this register to enable OTP operation. Once
49
Bit
Field
Bit
Field
Bit
Field
LSR_CW_COMP1 and LSR_CW_COMP0 bits must contain the complement of LSR_CW1 and LSR_CW0 bits in
order to set the laser to continuous (CW) mode. Other bits MUST be set to 0.
enabled, all OTP registers must be written as the default values are zero value.
Field Name
LSR_CW_COMP1 :
LSR_CW_COMP0
7
0
7
INV_RID
7
L2_USE_
OTP
7
7
6
0
6
INV_RID
6
L2_USE_
OTP
6
6
Description
MUST be complement of LSR_CW[1-0] bit in register 0x75
Address: 0x76
Reset Value: 0x0F
Address: 0x7E
Reset Value: 0xFE
Address: 0xBB
Reset Value: 0x00
5
0
5
INV_RID
5
L2_USE_
OTP
5
5
4
0
4
INV_RID
4
L2_USE_
OTP
4
4
3
0
3
INV_RID
3
L2_USE_
OTP
3
3
2
LSR_CW_
COMP1
2
INV_RID
2
L2_USE_
OTP
2
Type: Device
Type: Device
Type: OTP
2
1
0
1
INV_RID
1
L2_USE_
OTP
1
1
0
LSR_CW_
COMP0
0
INV_RID
0
L2_USE_
OTP
0
0