CDB5571-1 Cirrus Logic Inc, CDB5571-1 Datasheet - Page 5
![ADC Development Tool](/photos/24/9/240921/4607410_sml.jpg)
CDB5571-1
Manufacturer Part Number
CDB5571-1
Description
ADC Development Tool
Manufacturer
Cirrus Logic Inc
Datasheet
1.CDB5571.pdf
(26 pages)
Specifications of CDB5571-1
Silicon Manufacturer
Cirrus Logic
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
CS5571
Kit Contents
100 KSPS, 16-bit Delta-Sigma ADC Evaluation Board
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2. QUICK START
The CDB5571 evaluation board is designed to interface with a data acquisition system. To connect and
configure the CDB5571 perform the following initialization procedure:
DS768DB4
1. Verify that the power supplies are off.
2. Connect the power supplies to the CDB5571 as shown in Table 1 on page 6.
3. Verify that the power is off to the analog input signal & control signal sources.
4. Connect the analog input signal source to the evaluation board per Table 2 on page 6. Verify from Table 4
5. Configure the CDB5571 by connecting the control signal sources to the evaluation board as shown in
6. Make connections to the SPI™ serial port connector as shown in Table 5 on page 8. The CS5571 ADC
7. Turn on the power supplies to the evaluation board.
8. Apply power to the signal source.
9. Press the Reset switch on the evaluation board.
10. The CS5571 ADC's SPI™ serial port should now be communicating data.
on page 8 that the analog input channel selected is IN_A.
Table 3 on page 7. Apply logic-level inputs as required to override the resistor pull-ups/pull-downs.
serial port is configured by default to operate in the SSC (Synchronous Self Clocking) mode. Refer to the
CS5571 data sheet for more information on serial communication modes and signal timing.
NOTES:
1. Shaded boxes marked with "OPT. CONFIG." are not necessary for operation in an end user product.
2. Calibration function has been removed from the device but still appears on the PCB. J2 must be shorted (grounded)
for proper operation. See Appendix E for details.
DC Supply
Buffer Enable
ADC Reset
Calibrate
Figure 2. CDB5571 Board Layout
2
Master/Slave SPI
Signals to ADC & Mux
ADC MCLK Out
4.096 V Reference
Analog Inputs
CDB5571
5