SI9130DB Vishay, SI9130DB Datasheet - Page 13
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SI9130DB
Manufacturer Part Number
SI9130DB
Description
Pulse Width Modulation (PWM) Controller IC
Manufacturer
Vishay
Datasheet
1.SI9130CG.pdf
(14 pages)
Specifications of SI9130DB
Silicon Manufacturer
Vishay
Application Sub Type
Pin-programmable Controller
Kit Application Type
Power Management
Silicon Core Number
SI9130
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DESIGN CONSIDERATIONS
Inductor Design
Three specifications are required for inductor design: inductance
(L), peak inductor current (I
equation for computing inductance is:
L +
When LIR is higher, smaller inductance values are acceptable, at
the expense of increased ripple and higher losses.
The peak inductor current (I
load current (I
(I
30% of the steady-state current, which gives I
times I
The equation for computing peak inductor current is:
I LPEAK + I
OUTPUT CAPACITORS
The output capacitors determine loop stability and ripple voltage
at the output. In order to maintain stability, minimum capacitance
and maximum ESR requirements must be met according to the
following equations:
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Where:
LPP
). Typically, a designer will select the ac inductor current to be
V
V
OUT
OUT
IN(MAX)
OUT
.
V
V
f =
I
LIR = Ratio of inductor pea-to-peak ac current to
average dc load current, typically 0.3.
V
OUT
)
OUT
IN(MAX)
IN(MAX)
( f ) I
OUT
V
= Maximum dc load current (A);
OUT
Switching frequency, normally
300 kHz;
= Output voltage (3.3 V or 5 V);
OUT
(2)(f)(L) V IN(MAX)
) plus one half of the peak-to-peak ac current
–V
= Maximum input voltage (V);
V IN(MAX) –V
( LIR )
OUT
LPEAK
LPEAK
OUT
), and coil resistance (R
) is equal to the steady-state
LPEAK
equal to 1.15
L
). The
C
ESR
Both minimum capacitance and maximum ESR requirements
must be met. In order to get the low ESR, a capacitance value two
to three times greater than the required minimum may be
necessary.
The equation for output ripple in continuous current mode is:
V
The equations for capacitive and resistive components of the
ripple in pulse-skipping mode are:
V
V
Lower Voltage Input
The application circuit shown here can be easily modified to work
with 5.5-V to 12-V input voltages. Oscillation frequency should be
set at 200 kHz and increase the output capacitance to 660 mF on
the 5-V output to maintain stable performance up to 2 A of load
current. Operation on the 3.3-V supply will not be affected by this
reduced input voltage.
and,
Where:
The total ripple, V
as follows:
otherwise, V
OUT(RPL)
OUT(RPL)
OUT(RPL)
F
u
CF
(4) 10
R
then V
V
t
CS
OUT
(C) +
(R) +
+ I
if V
2
V
–4
C
V
V
R
GBWP = Gain-bandwidth product, 60 kHz;
ESR
OUT
C
REF
OUT
F
CS
V
R
LPP(MAX)
V
(L)
F
OUT(RPL)
OUT(RPL)
OUT(RPL)
OUT(RPL)
= Output filter capacitance (F)
CS
REF
(0.02) ESR
CF
V
= Sense resistor (W);
= Reference voltage, 3.3 V;
R
= Output voltage, 3.3 V or 5 V;
OUT(RPL)
REF
(2)(p)(GPWP)
CS
= Output filter capacitor ESR (W).
R
V
CS
OUT
(R) < 0.5 V
(R).
1
= V
= V
ESR
, can be approximated
)
CF
OUT(RPL)
OUT(RPL)
V
CF
Volts
IN
–V
)
1
OUT(RPL)
OUT
(C),
(C) +
( 2
Vishay Siliconix
f
Volts
1
(C),
CF )
www.vishay.com
Si9130
13