MAX16826ATJ+C24 Maxim Integrated Products, MAX16826ATJ+C24 Datasheet - Page 19

• Manufacturer Part Number: MAX16826ATJ+C24
• Description: LED Drivers Programmable Four-St ring HB LED Driver w
• Manufacturer: Maxim Integrated Products

Specifications of MAX16826ATJ+C24

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The communication between the µC and the MAX16826
is based on the usage of a set of protocols defined on
top of the standard I
exclusively write byte(s) and read byte(s).
The write byte protocol is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address followed
3) The addressed slave asserts an ACK by pulling
4) The master sends an 8-bit command code.
5) The slave asserts an ACK by pulling SDA low.
6) The master sends an 8-bit data byte.
7) The slave acknowledges the data byte.
8) The master generates a STOP condition or repeats
The command is interpreted as the destination address
(register file unit) and data is written in the addressed
location. The slave asserts a NACK at step 5 if the com-
mand is not valid. The master then interrupts the com-
munication by issuing a STOP condition. If the address
is correct, the data byte is written to the addressed reg-
ister. After the write, the internal address pointer is
increased by one. When the last location is reached, it
cycles to the first register.
Figure 8. Read Byte Format
Figure 7. Write Byte Format
Output-Voltage Optimization and Fault Detection
READ BYTE FORMAT
S
by a write bit (low).
SDA low.
6 and 7 to write next byte(s).
WRITE BYTE FORMAT
S
Programmable, Four-String HB LED Driver with
SLAVE ADDRESS
7 BITS
SLAVE ADDRESS
______________________________________________________________________________________
7 BITS
2
Accessing the MAX16826
C protocol definition. They are
R/W
0
ACK
COMMAND BYTE: PREPARE DEVICE FOR
R/W
0
FOLLOWING READ
ACK
COMMAND
8 BITS
Write Byte(s)
COMMAND BYTE: SELECT REGISTER TO WRITE
COMMAND
ACK SR
8 BITS
The read sequence is:
The data byte read from the device is the content of the
addressed location(s). Once the read is done, the inter-
nal pointer is increased by one. When the last location is
reached, it cycles to the first one. If the device is busy or
the address is not correct (out of memory map), the
command code is not acknowledged and the internal
address pointer is not altered. The master then inter-
rupts the communication by issuing a STOP condition.
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a
3) The addressed slave asserts an ACK on the data
4) The master sends an 8-bit command byte.
5) The active slave asserts an ACK on the data line.
6) The master sends a repeated START condition.
7) The master sends the 7-bit slave address plus a
8) The addressed slave asserts an ACK on the data
9) The slave sends an 8-bit data byte.
10) The master asserts a NACK on the data line to
11) The master generates a STOP condition.
write bit (low).
line.
read bit (high).
line.
complete operations or asserts an ACK and
repeats 9 and 10.
SLAVE ADDRESS
7 BITS
ACK
DATA BYTE DATA GOES INTO THE REGISTER
R/W
1
SET BY THE COMMAND BYTE
ACK
REGISTER SET BY THE COMMAND BYTE
DATA BYTE DATA COMES FROM THE
8 BITS
DATA
8 BITS
DATA
Read Byte(s)
ACK
NACK
P
P
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