XR21V1410IL-0C-EB Exar Corporation, XR21V1410IL-0C-EB Datasheet - Page 22

• Manufacturer Part Number: XR21V1410IL-0C-EB
• Description: Interface Modules & Development Tools For XR21V1410 QFN16 USB, RS485;No Cables
• Manufacturer: Exar Corporation
• Series: -r

Specifications of XR21V1410IL-0C-EB

• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V
• Product: Interface Modules
• Silicon Core Number: XR21V1410
• Application Sub Type: UART
• Kit Contents: Board
• Main Purpose: Interface, USB 2.0 to UART
• Embedded: No
• Utilized Ic / Part: XR21V1410IL
• Primary Attributes: -
• Secondary Attributes: -
• Silicon Manufacturer: Exar
• Kit Application Type: Communication & Networking
• For Use With/related Products: XR21V1410
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XR21V1410
1-CH FULL-SPEED USB UART
GPIO_MODE[3]: Transceiver Enable Polarity
GPIO_MODE[7:4]: Reserved
These register bits are reserved. When writing to these bits, the value should be ’0’. When reading from these
bits, they are undefined and should be ignored.
This register controls the direction of the GPIO if it is not controlled by the GPIO_MODE register.
GPIO_DIRECTION[5:0]: GPIOx Direction
GPIO_DIRECTION[7:6]: Reserved
These register bits are reserved and should be ’0’.
Enables / disables generation of a USB interrupt packet at the change of state of GPIO pins when they are
configured as inputs.
GPIO_INT_MASK[5:0]: GPIOx Interrupt Mask
GPIO_INT_MASK[7:6]: Reserved
These register bits are reserved and should be ’0’.
Writing a ’1’ in this register drives the GPIO output high. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
Writing a ’1’ in this register drives the GPIO output low. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
This register reports the current state of the GPIO pin.
A
3.4
3.3.13
3.3.14
3.3.15
3.3.16
3.3.17
DDRESS
Logic 0 = GPIO5 Low for TX
Logic 1 = GPIO5 High for TX
Logic 0 = GPIOx is an input.
Logic 1 = GPIOx is an output.
Logic 0 = A change on this input causes the device to generate an interrupt packet.
Logic 1 = A change on this input does not cause the device to generate an interrupt packet.
0X03
0x04
0x06
UART Custom Registers..
WIDE_MODE
LOW_LATENCY
CUSTOM_INT_PACKET
GPIO_DIRECTION Register Description (Read/Write)
GPIO_INT_MASK Register Description (Read/Write)
GPIO_SET Register Description (Read/Write)
GPIO_CLEAR Register Description (Read/Write)
GPIO_STATUS Register Description (Read-Only)
R
EGISTER
N
AME
B
T
IT
ABLE
0
0
0
-7
15: UART C
GPIO5
B
IT
0
0
-6
22
GPIO4
B
USTOM
IT
0
0
-5
R
GPIO3
EGISTERS
B
IT
0
0
-4
GPIO0
B
IT
0
0
-3
B
IT
0
0
0
-2
GPIO2
B
IT
0
0
-1
REV. 1.2.0
GPIO1
B
EN
EN
IT
-0