DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 225

• Manufacturer Part Number: DS33X42DK
• Description: Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
• Manufacturer: Maxim Integrated Products

Specifications of DS33X42DK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19Fh:
Default
1A1h:
Default
Register Name:
Register Description:
Register Address:
19Eh:
Default
Bits 0-15: LAN Queue Near Full Interrupt Mask (LQNFIM[16-1]) This register provides an interrupt bit mask to
filter out unwanted interrupts.
Register Name:
Register Description:
Register Address:
1A0h:
Default
Bits 0-15: WAN Queue Overflow Status (WQOS[16-1]) This register indicates whether an overflow condition has
occurred on any of the WAN Queues since the last read of this register (one status bit per WAN Queue). This
register is reset each time it is read.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = Bit mask disabled
1 = Bit mask enabled
0 = No overflow condition detected
1 = At least one overflow condition detected since last read
LQNFIM-16
LQNFIM-8
WQOS-16
WQOS-8
Bit 15
Bit 15
Bit 7
Bit 7
0
0
0
0
LQNFIM-15
LQNFIM-7
WQOS-15
WQOS-7
Bit 14
Bit 14
Bit 6
Bit 6
0
0
0
0
AR.LQNFIM
LAN Queue Near Full Interrupt Mask
19Eh
AR.WQOS
WAN Queue Overflow Status
1A0h
LQNFIM-14
LQNFIM-6
WQOS-14
WQOS-6
Bit 13
Bit 13
Bit 5
Bit 5
0
0
0
0
LQNFIM-13
LQNFIM-5
WQOS-13
WQOS-5
Bit 12
Bit 12
Bit 4
Bit 4
0
0
0
0
LQNFIM-12
LQNFIM-4
WQOS-12
WQOS-4
Bit 11
Bit 11
Bit 3
Bit 3
0
0
0
0
LQNFIM-11
LQNFIM-3
WQOS-11
WQOS-3
Bit 10
Bit 10
Bit 2
Bit 2
0
0
0
0
LQNFIM-10
LQNFIM-2
WQOS-10
WQOS-2
Bit 9
Bit 1
Bit 9
Bit 1
0
0
0
0
LQNFIM-9
LQNFIM-1
WQOS-9
WQOS-1
225 of 375
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0