LCMXO640C-L-EV Lattice, LCMXO640C-L-EV Datasheet - Page 9

• Manufacturer Part Number: LCMXO640C-L-EV
• Description: MCU, MPU & DSP Development Tools MachXO 640 Eval Brd Standard
• Manufacturer: Lattice

Specifications of LCMXO640C-L-EV

• Processor To Be Evaluated: Lattice MachXO
• Interface Type: JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 5. Prototype Grid 4
Prototype Grid 5 : The last of the prototype grid is designed for use with an LCD display. U3 can be populated by a
Lumex LCD-S501C39TR five-element, seven-segement LCD display. When this display is populated, it is mounted
on the rows between U3 and JP23/JP24. JP23 and JP24 can then be populated with general-purpose headers.
Jumpers can then be used to control connections between the MachXO device pins and the LCD.
When this LCD is not populated (default condition), the outer columns of JP23 and JP24 can be used as general-
purpose I/O test points.
Short-circuit
9
LVDS Paired
MachXO Standard Evaluation Board
Revisions 001 & 002 User’s Guide
Direct to
MachXO