M1-SYSMGMT-DEV-KIT Actel, M1-SYSMGMT-DEV-KIT Datasheet - Page 30
M1-SYSMGMT-DEV-KIT
Manufacturer Part Number
M1-SYSMGMT-DEV-KIT
Description
MCU, MPU & DSP Development Tools System Management Development Kit
Manufacturer
Actel
Datasheet
1.M1-SYSMGMT-DEV-KIT-FP3.pdf
(94 pages)
Specifications of M1-SYSMGMT-DEV-KIT
Processor To Be Evaluated
AFS1500-FG484
Interface Type
RS-232, USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Hardware Components
30
The following signals are provided in the debug area:
• Power: 5 V, 3.3 V, 1.5 V and digital and analog GND are provided in this are for easy access. Ensure that the current
• Spare I/Os: 24 I/Os are provided for debug purposes. These I/Os are connected to the A3P250-FG144 FPGA part.
• Gate Driver: Three gate driver pins are provided: IO_BLUE_TRI, IO_GREEN_TRI, IO_ORANGE_TRI. When
• Trim Voltage: This signal is used in the digital brick application. See
• External Voltages: These are the same input signal provided in
consumption for any part added to this does not exceed 500 mA.
using these gate drivers, check the jumper settings
routed to the prototype area. This pin can be configured as PWM output.
debug purposes.
IO_BLUE_TRI
IO_GREEN_TRI
IO_ORANGE_TRI
Signal
Jumpers
Table 2-23 · Jumper Settings
JP29
JP30
JP31
(Figure
2-23).
“Voltage Monitors” on page 24
Tri-LED
M1 System Management Board User’s Guide
1-2
1-2
1-2
“Digital Brick” on page
Remove Jumper
Remove Jumper
Remove Jumper
Gate Driver
25. This signal is also
and can be used for
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