XCS30-3PQ240C Xilinx Inc, XCS30-3PQ240C Datasheet - Page 19
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XCS30-3PQ240C
Manufacturer Part Number
XCS30-3PQ240C
Description
INTERGRATED CIRCUIT
Manufacturer
Xilinx Inc
Series
Spartan™r
Datasheet
1.XCS05XL-4VQG100C.pdf
(83 pages)
Specifications of XCS30-3PQ240C
Number Of Logic Elements/cells
1368
Number Of Labs/clbs
576
Total Ram Bits
18432
Number Of I /o
192
Number Of Gates
30000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP
Case
QFP240
Dc
01+/04+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCS30-3PQ240C
Manufacturer:
XILINX
Quantity:
1 238
Company:
Part Number:
XCS30-3PQ240C
Manufacturer:
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Quantity:
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Part Number:
XCS30-3PQ240C
Manufacturer:
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Quantity:
20 000
3-State Long Line Drivers
A pair of 3-state buffers is associated with each CLB in the
array. These 3-state buffers (BUFT) can be used to drive
signals onto the nearest horizontal longlines above and
below the CLB. They can therefore be used to implement
multiplexed or bidirectional buses on the horizontal lon-
glines, saving logic resources.
There is a weak keeper at each end of these two horizontal
longlines. This circuit prevents undefined floating levels.
However, it is overridden by any driver.
The buffer enable is an active High 3-state (i.e., an active
Low enable), as shown in
DS060 (v1.8) June 26, 2008
Product Specification
G4
G1
F2
F1
F3
"Weak Keeper"
M
R
~100 kΩ
M
M
Table
0
11.
Figure 17: Detail of Spartan/XL Dedicated Carry Logic
Figure 18: 3-state Buffers Implement a Multiplexer
1
D
A
A
BUFT
Z = (D
www.xilinx.com
D
A
B
B
• A) + (D
M
I
Three-State Buffer Example
Figure 18
ment a multiplexer. The selection is accomplished by the
buffer 3-state signal.
Pay particular attention to the polarity of the T pin when
using these buffers in a design. Active High 3-state (T) is
identical to an active Low output enable, as shown in
Table
Table 11: Three-State Buffer Functionality
BUFT
1
0
3
1
0
B
1
0
M
M
M
Spartan and Spartan-XL FPGA Families Data Sheet
• B) + (D
11.
IN
IN
X
0
shows how to use the 3-state buffers to imple-
C
D
OUT
0
C
C
C
1
• C) + (D
C
1
C IN
OUT0
BUFT
N
G2
G3
• N)
F4
T
1
0
D
N
M
M
M
N
BUFT
TO
FUNCTION
GENERATORS
DS060_17_080400
DS060_18_080400
OUT
IN
Z
19