24LC04BHT-E/ST Microchip Technology, 24LC04BHT-E/ST Datasheet - Page 7

• Manufacturer Part Number: 24LC04BHT-E/ST
• Description: 4K, 512 X 8 2.5V SERIAL EE, EXT, 1/2 ARRAY WP 8 TSSOP 4.4mm T/R
• Manufacturer: Microchip Technology

Specifications of 24LC04BHT-E/ST

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 4K (2 x 256 x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.0
4.1
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits) and the
R/W bit, which is a logic-low, is placed onto the bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow once it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the word address and will be
written into the Address Pointer of the 24XX04H. After
receiving another Acknowledge signal from the
24XX04H, the master device will transmit the data word
to be written into the addressed memory location. The
24XX04H acknowledges again and the master
generates a Stop condition. This initiates the internal
write cycle and, during this time, the 24XX04H will not
generate Acknowledge signals (Figure 4-1).
FIGURE 4-1:
FIGURE 4-2:
© 2008 Microchip Technology Inc.
SDA Line
Bus Activity
Master
Bus Activity
SDA Line
Bus Activity
Master
Bus Activity
WRITE OPERATION
Byte Write
x = “don’t care”
x = “don’t care”
BYTE WRITE
PAGE WRITE
S
S
T
A
R
T
1 0 1 0 X X B0 0
S
S
T
A
R
T
1
0
Control
1
Byte
0 X X
Control
Select
Byte
Block
Bits
Select
B0
Block
Bits
0
A
C
K
Address (n)
Word
A
C
K
A
C
K
Address
Word
4.2
The write control byte, word address and the first data
byte are transmitted to the 24XX04H in the same way
as in a byte write. However, instead of generating a
Stop condition, the master transmits up to 16 data bytes
to the 24XX04H, which are temporarily stored in the on-
chip page buffer and will be written into memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order Address
Pointer bits are internally incremented by ‘
higher-order 5 bits of the word address remain
constant. If the master should transmit more than 16
words prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 4-2).
24AA04H/24LC04BH
Data (n)
Note:
Page Write
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page-size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
A
C
K
A
C
K
Data (n + 1)
Data
A
C
K
Data (n + 15)
DS22119A-page 7
A
C
K
1
P
S
T
O
P
’. The
A
C
K
S
T
O
P
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