AD5203ARZ100-REEL Analog Devices Inc, AD5203ARZ100-REEL Datasheet

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AD5203ARZ100-REEL

Manufacturer Part Number
AD5203ARZ100-REEL
Description
IC,Digital Potentiometer,SOP,24PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5203ARZ100-REEL

Taps
64
Resistance (ohms)
100K
Number Of Circuits
4
Temperature Coefficient
700 ppm/°C Typical
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Resistance In Ohms
100K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
a
GENERAL DESCRIPTION
The AD5203 provides a quad channel, 64-position digitally-
controlled variable resistor (VR) device. These parts perform the
same electronic adjustment function as a potentiometer or vari-
able resistor. The AD5203 contains four independent variable
resistors in a 24-lead SOIC and the compact TSSOP-24 pack-
ages. Each part contains a fixed resistor with a wiper contact
that taps the fixed resistor value at a point determined by a digi-
tal code loaded into the controlling serial input register. The
resistance between the wiper and either endpoint of the fixed
resistor varies linearly with respect to the digital code transferred
into the VR latch. Each variable resistor offers a completely
programmable value of resistance, between the A terminal and
the wiper or the B terminal and the wiper. The fixed A-to-B
terminal resistance of 10 k , or 100 k has a 1% channel-to-
channel matching tolerance with a nominal temperature coeffi-
cient of 700 ppm/ C.
Each VR has its own VR latch which holds its programmed
resistance value. These VR latches are updated from an internal
serial-to-parallel shift register that is loaded from a standard
3-wire serial-input digital interface. Eight data bits make up the
data word clocked into the serial input register. The data word is
decoded where the first two bits determine the address of the VR
latch to be loaded, the last 6-bits are data. A serial data output
pin at the opposite end of the serial register allows simple daisy-
chaining in multiple VR applications without additional external
decoding logic.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
64 Position
Replaces Four Potentiometers
10 k , 100 k
Power Shutdown—Less than 5
3-Wire SPI-Compatible Serial Data Input
10 MHz Update Data Loading Rate
+2.7 V to +5.5 V Single Supply Operation
Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Programmable Filters, Delays, Time Constants
Volume Control, Panning
Line Impedance Matching
Power Supply Adjustment
A
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
DGND
The reset RS pin forces the wiper to the midscale position by
loading 20
tor to an end-to-end open circuit condition on terminal A and
shorts the wiper to terminal B, achieving a microwatt power
shutdown state. When shutdown is returned to logic-high the
previous latch settings put the wiper in the same resistance set-
ting prior to shutdown.
The AD5203 is available in a narrow body P-DIP-24, the
24-lead surface mount package, and the compact 1.1 mm thin
TSSOP-24 package. All parts are guaranteed to operate over the
extended industrial temperature range of –40 C to +85 C.
For pin compatible higher resolution applications, see the 256-
position AD8403 product.
CLK
V
SDI
CS
DD
H
into the VR latch. The SHDN pin forces the resis-
FUNCTIONAL BLOCK DIAGRAM
AD5203
4-Channel, 64-Position
D
CK Q RS
SELECT
World Wide Web Site: http://www.analog.com
Digital Potentiometer
SERIAL
A1, A0
LATCH
DAC
8-BIT
SDO
2
1
2
3
4
6
RS
© Analog Devices, Inc., 1998
LATCH
CK RS
LATCH
CK RS
LATCH
CK RS
LATCH
CK RS
6-BIT
6-BIT
6-BIT
6-BIT
AD5203
6
6
6
6
DAC 1
SHDN
DAC 2
SHDN
DAC 3
SHDN
DAC 4
SHDN
SHDN
A1
W1
B1
AGND1
A2
B2
AGND2
A3
A4
B4
AGND4
W2
W3
B3
AGND3
W4

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AD5203ARZ100-REEL Summary of contents

Page 1

FEATURES 64 Position Replaces Four Potentiometers 100 k Power Shutdown—Less than 5 3-Wire SPI-Compatible Serial Data Input 10 MHz Update Data Loading Rate +2 +5.5 V Single Supply Operation Midscale Preset APPLICATIONS Mechanical Potentiometer ...

Page 2

AD5203–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs 2 Resistor Differential NL 2 Resistor Nonlinearity Error 3 Nominal Resistor Tolerance Resistance Temperature Coefficient Wiper Resistance Nominal Resistance Match DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply ...

Page 3

NOTES 1 Typicals represent average readings at +25 C and V 2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi- tions. R-DNL measures the relative ...

Page 4

AD5203 PIN CONFIGURATION AGND2 AGND4 5 20 AD5203 (Not to Scale DGND 9 16 SHDN ...

Page 5

V = +3V 10k CODE – Decimal Figure 2. Wiper to ...

Page 6

Performance Characteristics AD5203 R W (20mV/DIV) CS (5V/DIV) TIME 500ns/DIV Figure 11. One Position Step Change at Half-Scale (Code OUTPUT CS TIME 5 s/DIV Figure 14. Large Signal Settling Time 0 CODE = ...

Page 7

CODE = 10pF 4V 10k 100k 1M FREQUENCY – ...

Page 8

Test Circuits AD5203 DUT 1LSB = V+/ Figure 26. Potentiometer Divider Nonlinearity Error Test Circuit (INL, DNL) NO CONNECT DUT Figure 27. Resistor Position Nonlinearity Error (Rheostat ...

Page 9

OPERATION The AD5203 provides a quad channel, 64-position digitally- controlled variable resistor (VR) device. Changing the pro- grammed VR settings is accomplished by clocking in an 8-bit serial data word into the SDI (Serial Data Input) pin. The for- mat ...

Page 10

AD5203 PROGRAMMING THE POTENTIOMETER DIVIDER Voltage Output Operation The digital potentiometer easily generates an output voltage proportional to the input voltage applied to a given terminal. For example connecting A–terminal and B–terminal to ground produces an output ...

Page 11

The data setup and data hold times in the specification table determine the data valid time requirements. The last eight bits of the data word entered into the serial register are held when CS returns high. At the same time ...

Page 12

AD5203 0.210 (5.33) MAX 0.200 (5.05) 0.125 (3.18) 0.0118 (0.30) 0.0040 (0.10) 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead Narrow Body Plastic DIP (N-24) 1.275 (32.30) 1.125 (28.60 0.280 (7.11) ...

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