AD677KR Analog Devices Inc, AD677KR Datasheet
AD677KR
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AD677KR Summary of contents
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FEATURES Autocalibrating On-Chip Sample-Hold Function Serial Output 16 Bits No Missing Codes 1 LSB INL –99 dB THD 92 dB S/(N+D) 1 MHz Full Power Bandwidth PRODUCT DESCRIPTION The AD677 is a multipurpose 16-bit serial output analog-to- digital converter ...
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AD677–SPECIFICATIONS AC SPECIFICATIONS ( MIN Parameter 2 Total Harmonic Distortion (THD kSPS MIN MAX @ 100 kSPS, + 100 kSPS MIN MAX Signal-to-Noise and Distortion Ratio (S/(N+D)) @ ...
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DC SPECIFICATIONS ( MIN Parameter TEMPERATURE RANGE J, K Grades A, B Grades ACCURACY Resolution Integral Nonlinearity (INL kSPS MIN MAX @ 100 kSPS, + 100 kSPS MIN ...
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AD677 TIMING SPECIFICATIONS Parameter 2, 3 Conversion Period 4 CLK Period Calibration Time Sampling Time 5 Last CLK to SAMPLE Delay SAMPLE Low SAMPLE to Busy Delay 1st CLK Delay 6 CLK Low 6 CLK High CLK to BUSY Delay ...
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... Temperature Model Range AD677JN +70 C AD677KN +70 C AD677JD +70 C AD677KD +70 C AD677JR +70 C AD677KR +70 C AD677AD – +85 C AD677BD – + Ceramic DIP Plastic DIP Small Outline IC (SOIC). ABSOLUTE MAXIMUM RATINGS –0 +26 DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0 Vcc to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0 +18 V VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . – +0.3 V AGND to DGND ...
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AD677 DIP Pin SOIC Pin Type 1 1 SAMPLE 2 2 CLK 3 3 SDATA DGND AGND .9 15 AGND SENSE REF 12 21 ...
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NYQUIST FREQUENCY An implication of the Nyquist sampling theorem, the “Nyquist frequency’’ converter is that input frequency which is one half the sampling frequency of the converter. TOTAL HARMONIC DISTORTION Total harmonic distortion (THD) is the ratio of ...
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AD677 FUNCTIONAL DESCRIPTION The AD677 is a multipurpose 16-bit analog-to-digital converter and includes circuitry which performs an input sample/hold function, ground sense, and autocalibration. These functions are segmented onto two monolithic chips—an analog signal pro- cessor and a digital controller. ...
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Figure 3. In this circuit BUSY is used to reset the circuitry which divides the system clock down to provide the AD677 CLK. This serves to interrupt the clock until after the input sig- nal has been acquired, which ...
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AD677 Additionally beneficial to have large capacitors (>47 F) located at the point where the power connects to the PCB with 10 F capacitors located in the vicinity of the ADC to further reduce low frequency ripple. In ...
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A capacitor connected between REF IN and AGND will reduce the demands on the reference by decreasing the magnitude of high frequency com- ponents required to be sourced by the reference. Figures 6 ...
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AD677 AC PERFORMANCE AC parameters, which include S/(N+D), THD, etc., reflect the AD677’s effect on the spectral content of the analog input sig- nal. Figures 11 through 18 provide information on the AD677’s ac performance under a variety of conditions. ...
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The standard deviation of this distribution is approximately 0.5 LSBs. If less uncertainty is desired, averaging multiple con- versions will narrow this distribution by the inverse of the square root of the number of samples; i.e., the average of 4 ...
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AD677 100 1k 10k RIPPLE FREQUENCY – Hz Figure 15. AC Power Supply Rejection ( kSPS 0.13 V p-p SAMPLE RIPPLE 0 –30 –50 –70 –90 ...
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PIN 1 0.0118 (0.30) 0.0040 (0.10) REV. A OUTLINE DIMENSIONS Dimensions shown in inchcs and (mm) D-16 16-Lead Side Brazed Ceramic DIP Package 0.005 (0.13) MIN 0.080 (2.03) MAX 16 9 0.310 (7.87) PIN 1 0.220 ...
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