AD7147ACPZ-1REEL Analog Devices Inc, AD7147ACPZ-1REEL Datasheet - Page 33

IC,Converter, Other/Special/Miscellaneous,LLCC,24PIN

AD7147ACPZ-1REEL

Manufacturer Part Number
AD7147ACPZ-1REEL
Description
IC,Converter, Other/Special/Miscellaneous,LLCC,24PIN
Manufacturer
Analog Devices Inc
Series
CapTouch™r
Type
Capacitive Sensor Controllerr
Datasheet

Specifications of AD7147ACPZ-1REEL

Resolution (bits)
16 b
Data Interface
I²C, Serial
Voltage Supply Source
Single Supply
Voltage - Supply
2.6 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7147EBZ - BOARD EVAL FOR AD7147ACPZEVAL-AD7147-1EBZ - BOARD EVAL FOR AD7147ACPZ-1
Sampling Rate (per Second)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SERIAL INTERFACE
The AD7147 is available with an SPI-compatible interface. The
AD7147-1 is available with an I
parts are the same, with the exception of the serial interface.
SPI INTERFACE
The AD7147 has a 4-wire serial peripheral interface (SPI). The
SPI has a data input pin (SDI) for inputting data to the device, a
data output pin (SDO) for reading data back from the device,
and a data clock pin (SCLK) for clocking data into and out of
the device. A chip select pin ( CS ) enables or disables the serial
interface. CS is required for correct operation of the SPI. Data is
clocked out of the AD7147 on the negative edge of SCLK and
data is clocked into the device on the positive edge of SCLK.
SPI Command Word
All data transactions on the SPI bus begin with the master
taking CS from high to low and sending out the command
word. This indicates to the AD7147 whether the transaction is a
read or a write and provides the address of the register from
which to begin the data transfer. The following bit map shows
the SPI command word.
MSB
15
1
SCLK
SDI
CS
14
1
NOTES
1. SDI BITS ARE LATCHED ON SCLK RISING EDGES. SCLK CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 32 BITS MUST BE WRITTEN: 16 BITS FOR THE CONTROL WORD AND 16 BITS FOR THE DATA.
3. 16-BIT COMMAND WORD SETTINGS FOR SERIAL WRITE OPERATION:
CW [15:11] = 11100 (ENABLE WORD)
CW [10] = 0 (R/W)
CW [9:0] = [AD9, AD8, AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0] (10-BIT MSB-JUSTIFIED REGISTER ADDRESS)
CW
15
t
2
1
t
1
13
1
CW
ENABLE WORD
14
2
t
3
CW
13
12
0
3
CW
12
4
11
0
2
CW
11
C-compatible interface. Both
5
t
R/W
CW
4
10
10
R/W
6
16-BIT COMMAND WORD
CW
9
7
9:0
Register address
CW
8
8
Figure 49. Single Register Write SPI Timing
CW
7
t
5
9
REGISTER ADDRESS
CW
6
10
LSB
Rev. B | Page 33 of 72
CW
5
11
CW
4
12
CW
3
Bits[15:11] of the command word must be set to 11100 to
successfully begin a bus transaction.
Bit 10 is the read/write bit; 1 indicates a read, and 0 indicates
a write.
Bits[9:0] contain the target register address. When reading or
writing to more than one register, this address indicates the
address of the first register to be written to or read from.
Writing Data
Data is written to the AD7147 in 16-bit words. The first word
written to the device is the command word, with the read/write
bit set to 0. The master then supplies the 16-bit input data-word
on the SDI line. The AD7147 clocks the data into the register
addressed in the command word. If there is more than one
word of data to be clocked in, the AD7147 automatically incre-
ments the address pointer and clocks the subsequent data-word
into the next register.
The AD7147 continues to clock in data on the SDI line until
either the master finishes the write transition by pulling CS high
or the address pointer reaches its maximum value. The AD7147
address pointer does not wrap around. When it reaches its
maximum value, any data provided by the master on the SDI
line is ignored by the AD7147.
13
CW
2
14
CW
1
15
CW
0
16
D15
17
D14
18
D13
19
16-BIT DATA
D2
30
D1
t
8
31
AD7147
D0
32

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