AD7718BR Analog Devices Inc, AD7718BR Datasheet - Page 17

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AD7718BR

Manufacturer Part Number
AD7718BR
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7718BR

Peak Reflow Compatible (260 C)
No
No. Of Bits
24 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
Features
Analog Front End For Low Frequency Measurement
No. Of Channels
10
Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
1.37k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
3.84mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7718EBZ - BOARD EVALUATION FOR AD7718
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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–100
–120
–140
–160
–100
–120
–140
–160
–20
–40
–60
–80
–20
–40
–60
–80
0
0
0
0
SF = 69
OUTPUT DATA RATE = 19.8Hz
INPUT BANDWIDTH = 4.74Hz
FIRST NOTCH = 9.9Hz
50Hz REJECTION = –66dB, 50Hz 1Hz REJECTION = –60dB
60Hz REJECTION = –117dB, 60Hz 1Hz REJECTION = –94dB
SF = 255
OUTPUT DATA RATE = 5.35Hz
INPUT BANDWIDTH = 1.28Hz
50Hz REJECTION = –93dB, 50Hz 1Hz REJECTION = –93dB
60Hz REJECTION = –74dB, 60Hz 1Hz REJECTION = –68dB
10
10
20
20
30
30
FREQUENCY – Hz
40
FREQUENCY – Hz
40
50
50
60
60
70
70
80
80
90
90
100
100
ADC NOISE PERFORMANCE CHOP ENABLED
(CHOP = 0)
Tables II to V show the output rms noise and output peak-to-
peak resolution in bits (rounded to the nearest 0.5 LSB) for a
selection of output update rates. The numbers are typical and
generated at a differential input voltage of 0 V with AV
DV
rate is selected via the SF7–SF0 bits in the Filter Register. It is
important to note that the peak-to-peak resolution figures repre-
sent the resolution for which there will be no code flicker within
a six-sigma limit. The output noise comes from two sources. The
first is the electrical noise in the semiconductor devices (device
noise) used in the implementation of the modulator. Secondly,
when the analog input is converted into the digital domain,
quantization noise is added. The device noise is at a low level
and is independent of frequency. The quantization noise starts at
an even lower level but rises rapidly with increasing frequency to
become the dominant noise source. The numbers in the tables
are given for the bipolar input ranges. For the unipolar ranges
the rms noise numbers will be the same as the bipolar range, but
the peak-to-peak resolution is now based on half the signal range
which effectively means losing one bit of resolution.
DD
= 5 V and using a 2.5 V reference. The output update
–100
–120
–140
–160
–20
–40
–60
–80
0
0
SF = 68
OUTPUT DATA RATE = 20.07Hz
INPUT BANDWIDTH = 4.82Hz
50Hz REJECTION = –74dB, 50Hz 1Hz REJECTION = –54.6dB
60Hz REJECTION = –147dB, 60Hz 1Hz REJECTION = –101dB
10
20
30
FREQUENCY – Hz
40
50
AD7708/AD7718
60
70
80
90
DD
100
=

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