AD8191AASTZ-RL Analog Devices Inc, AD8191AASTZ-RL Datasheet
AD8191AASTZ-RL
Specifications of AD8191AASTZ-RL
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AD8191AASTZ-RL Summary of contents
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FEATURES 4 inputs, one output HDMI/DVI link Pin-to-pin compatible with the AD8197A 4 TMDS channels per link Supports 250 Mbps to 1.65 Gbps data rates Supports 25 MHz to 165 MHz pixel clocks Equalized inputs for operation with long HDMI ...
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AD8191A TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Typical Application........................................................................... 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 Maximum ...
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SPECIFICATIONS T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 mV, TMDS ...
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AD8191A Parameter 5 SERIAL CONTROL INTERFACE Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage PARALLEL CONTROL INTERFACE Input High Voltage Input Low Voltage ...
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ABSOLUTE MAXIMUM RATINGS Table 2. Parameter AVCC to AVEE DVCC to DVEE DVEE to AVEE VTTI VTTO AMUXVCC Internal Power Dissipation High Speed Input Voltage High Speed Differential Input Voltage Low Speed Input Voltage I 2 C® and Parallel Logic ...
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AD8191A PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AVCC 1 PIN 1 INDICATOR IN_B0 2 IP_B0 3 AVEE 4 IN_B1 5 IP_B1 6 VTTI 7 IN_B2 8 IP_B2 9 AVEE 10 IN_B3 11 IP_B3 12 AVCC 13 IN_A0 14 IP_A0 15 AVEE ...
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Pin No. Mnemonic 21 IP_A2 23 IN_A3 24 IP_A3 26 I2C_ADDR0 27 I2C_ADDR1 28 I2C_ADDR2 29, 95 DVEE 30 PP_CH0 31 PP_CH1 32, 38, 47 DVCC 33 ON0 34 OP0 35, 41 VTTO 36 ON1 37 OP1 39 ON2 40 ...
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AD8191A Pin No. Mnemonic 87 AUX_COM3 88 AUX_COM2 89 AUX_COM1 90 AUX_COM0 91 AUX_B3 92 AUX_B2 93 AUX_B1 94 AUX_B0 96 AUX_A3 97 AUX_A2 98 AUX_A1 99 AUX_A0 100 PP_OTO high speed low speed, I ...
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TYPICAL PERFORMANCE CHARACTERISTICS T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 ...
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AD8191A T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 mV, TMDS ...
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T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 mV, TMDS outputs ...
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AD8191A T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 mV, TMDS ...
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THEORY OF OPERATION INTRODUCTION The primary function of the AD8191A is to switch one of four (HDMI or DVI) single-link sources to one output. Each HDMI/ DVI link consists of four differential, high speed channels and four auxiliary single-ended, low ...
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AD8191A The AD8191A requires output termination resistors when the high speed outputs are enabled. Termination can be internal and/or external. The internal terminations of the AD8191A are enabled by programming the TX_PTO bit of the transmitter settings register or by ...
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SERIAL CONTROL INTERFACE RESET On initial power-up any point in operation, the AD8191A register set can be restored to preprogrammed default values by pulling the RESET pin low in accordance with the specifications in Table 1. During normal ...
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AD8191A READ PROCEDURE To read data from the AD8191A register set (such as a microcontroller) needs to send the appropriate control signals to the AD8191A slave device. The signals are 2 controlled by the I C master, unless ...
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PARALLEL CONTROL INTERFACE The AD8191A can be controlled through the parallel interface using the PP_EN, PP_CH[1:0], PP_EQ, PP_PRE[1:0], PP_OTO, and PP_OCL pins. Logic levels for the parallel interface pins are set in accordance with the specifications listed in Table 1. ...
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AD8191A SERIAL INTERFACE CONFIGURATION REGISTERS The serial interface configuration registers can be read and written using the I The least significant bits of the AD8191A I 3.3 V (Logic (Logic 0). As soon as the serial ...
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AUX_CH[1:0]: Auxiliary (Low Speed) Switch Source Select Bus Table 9. AUX_CH Mapping AUX_CH[1:0] AUX_COM[3:0] Description 00 AUX_A[3:0] Auxiliary Source A switched to output 01 AUX_B[3:0] Auxiliary Source B switched to output 10 AUX_C[3:0] Auxiliary Source C switched to output 11 ...
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AD8191A PARALLEL INTERFACE CONFIGURATION REGISTERS The parallel interface configuration registers can be directly set using the PP_EN, PP_CH[1:0], PP_EQ, PP_PRE[1:0], PP_OTO, and PP_OCL pins. This interface is only accessible after the part is reset and before any registers are accessed ...
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INPUT TERMINATION PULSE REGISTER 1 AND REGISTER 2 High speed input (TMDS) channels pulse-on-source switching fixed to off when using the parallel interface. RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2 PP_EQ: High Speed (TMDS) Input Equalization Level Select Bit (For ...
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AD8191A APPLICATIONS INFORMATION Figure 31. Layout of the TMDS Traces on the AD8191A Evaluation Board (Only Top Signal Routing Layer is Shown) The AD8191A is an HDMI/DVI switch featuring equalized TMDS inputs and pre-emphasized TMDS outputs intended for ...
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CABLE LENGTHS AND EQUALIZATION The AD8191A offers two levels of programmable equalization for the high speed inputs and 12 dB. The equalizer of the AD8191A supports video data rates of 1.65 Gbps. It can equalize ...
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AD8191A Additionally, the p and n of each differential pair must have a controlled differential impedance of 100 Ω. The characteristic impedance of a differential pair is a function of several variables including the trace width, the distance separating the ...
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Ground Current Return In some applications, it can be necessary to invert the output pin order of the AD8191A, which requires a designer to route the TMDS traces on multiple layers of the PCB. When routing differential pairs on multiple ...
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AD8191A Power Supplies The AD8191A has five separate power supplies referenced to two separate grounds. The supply/ground pairs are: • AVCC/AVEE • VTTI/AVEE • VTTO/AVEE • DVCC/DVEE • AMUXVCC/DVEE The AVCC/AVEE (3.3 V) and DVCC/DVEE (3.3 V) supplies power the ...
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... SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range 1 AD8191AASTZ −40°C to +85°C 1 AD8191AASTZ-RL −40°C to +85°C 1 AD8191A-EVALZ RoHS Compliant Part. 16.20 16.00 SQ 1.60 MAX 15.80 0.75 100 1 0.60 0.45 PIN 1 TOP VIEW (PINS DOWN) 0 ...
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AD8191A NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips Patent Rights to use these components ...