AD8191AASTZ-RL Analog Devices Inc, AD8191AASTZ-RL Datasheet - Page 3

• Manufacturer Part Number: AD8191AASTZ-RL
• Description: IC,Telecom Switching Circuit,QFP,100PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD8191AASTZ-RL

• Function: Switch
• Circuit: 1 x 4:1
• On-state Resistance: 100 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPECIFICATIONS
T
swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
EQUALIZATION PERFORMANCE
INPUT CHARACTERISTICS
OUTPUT CHARACTERISTICS
INPUT TERMINATION
AUXILIARY CHANNELS
POWER SUPPLY
QUIESCENT CURRENT
POWER DISSIPATION
TIMING CHARACTERISTICS
A
Maximum Data Rate (DR) per Channel
Bit Error Rate (BER)
Added Deterministic Jitter
Added Random Jitter
Differential Intrapair Skew
Differential Interpair Skew
Receiver (Highest Setting)
Transmitter (Highest Setting)
Input Voltage Swing
Input Common-Mode Voltage (V
High Voltage Level
Low Voltage Level
Rise/Fall Time (20% to 80%)
Resistance
On Resistance, R
On Capacitance, C
Input/Output Voltage Range
AVCC
AVCC
VTTI
VTTO
DVCC
AMUXVCC
Switching/Update Delay
RESET Pulse Width
= 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input
AUX
AUX
1
2
1
3
ICM
)
Conditions/Comments
NRZ
PRBS 2
DR ≤ 1.65 Gbps, PRBS 2
At output
At output
Boost frequency = 825 MHz
Boost frequency = 825 MHz
Differential
Single-ended, high speed channel
Single-ended, high speed channel
Single ended
DC bias = 2.5 V, ac voltage = 3.5 V, f = 100 kHz
Operating range
Outputs disabled
Outputs enabled, no pre-emphasis
Outputs enabled, maximum pre-emphasis
Input termination on
Output termination on, no pre-emphasis
Output termination on, maximum pre-emphasis
Outputs disabled
Outputs enabled, no pre-emphasis
Outputs enabled, maximum pre-emphasis
High speed switching register: HS_CH
All other configuration registers
23
− 1
Rev. 0 | Page 3 of 28
4
23
− 1
Min
1.65
150
AVCC − 800
AVCC − 10
AVCC − 600
75
DVEE
3
30
52
95
5
35
72
3.2
115
384
704
50
Typ
40
2
1
40
12
6
135
50
100
8
3.3
40
60
110
40
40
80
7
0.01
271
574
910
Max
10
1200
AVCC
AVCC + 10
AVCC − 400
200
AMUXVCC
3.6
44
66
122
54
46
90
8
0.1
361
671
1050
200
1.5
−9
AD8191A
Unit
Gbps
ps (p-p)
ps (rms)
ps
ps
dB
dB
mV
mV
mV
mV
ps
Ω
Ω
pF
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mW
mW
mW
ms
ms
ns