AD8191ASTZ-RL Analog Devices Inc, AD8191ASTZ-RL Datasheet - Page 22

IC,Telecom Switching Circuit,QFP,100PIN,PLASTIC

AD8191ASTZ-RL

Manufacturer Part Number
AD8191ASTZ-RL
Description
IC,Telecom Switching Circuit,QFP,100PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8191ASTZ-RL

Function
Switch
Circuit
1 x 4:1
On-state Resistance
100 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Package Type
LQFP
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8191ASTZ-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
AD8191
RECEIVER SETTINGS REGISTER
RX_TO: High Speed (TMDS) Channels Input Termination
On/Off Select Bit
Table 16. RX_TO Description
RX_TO
0
1
INPUT TERMINATION PULSE REGISTER 1 AND
REGISTER 2
RX_PT[X]: High Speed (TMDS) Input Channel X
Pulse-On-Source Switch Select Bit
Table 17. RX_PT[X] Description
RX_PT[X]
0
1
Table 18. RX_PT[X] Mapping
RX_PT[X]
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
Corresponding Input TMDS Channel
B0
B1
B2
B3
A0
A1
A2
A3
C3
C2
C1
C0
D3
D2
D1
D0
Description
Input termination off
Input termination on (can be pulsed on and off
according to settings in the input termination
pulse register)
Description
Input termination for TMDS Channel X always
connected when source is switched
Input termination for TMDS Channel X
disconnected for 100 ms when source switched
Rev. 0 | Page 22 of 32
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
RX_EQ[X]: High Speed (TMDS) Input X Equalization Level
Select Bit
Table 19. RX_EQ[X] Description
RX_EQ[X]
0
1
Table 20. RX_EQ[X] Mapping
RX_EQ[X]
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
TRANSMITTER SETTINGS REGISTER
TX_PE[1:0]: High Speed (TMDS) Output Pre-Emphasis
Level Select Bus (For All TMDS Channels)
Table 21. TX_PE[1:0] Description
TX_PE[1:0]
00
01
10
11
TX_PTO: High Speed (TMDS) Output Termination On/Off
Select Bit (For All Channels)
Table 22. TX_PTO Description
TX_PTO
0
1
TX_OCL:High Speed (TMDS) Output Current Level Select
Bit (For All Channels)
Table 23. TX_OCL Description
TX_OCL
0
1
Corresponding Input TMDS Channel
Description
Low equalization (6 dB)
High equalization (12 dB)
B0
B1
B2
B3
A0
A1
A2
A3
C3
C2
C1
C0
D3
D2
D1
D0
Description
No pre-emphasis (0 dB)
Low pre-emphasis (2 dB)
Medium pre-emphasis (4 dB)
High pre-emphasis (6 dB)
Description
Output termination off
Output termination on
Description
Output current set to 10 mA
Output current set to 20 mA

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