AD8306AR Analog Devices Inc, AD8306AR Datasheet - Page 12

• Manufacturer Part Number: AD8306AR
• Description: Logarithmic Amplifier IC
• Manufacturer: Analog Devices Inc
• Type: Limiting-Logarithmic Amplifierr

Specifications of AD8306AR

• No. Of Amplifiers: 1
• No. Of Pins: 16
• Peak Reflow Compatible (260 C): No
• Bandwidth: 400MHz
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Rohs Status: RoHS non-compliant
• Applications: Receiver Signal Strength Indication (RSSI)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD8306
f
MHz
10
10.7
15
20
21.4
25
30
35
40
45
50
60
80
100
120
150
200
250
300
350
400
450
500
General Matching Procedure
For other center frequencies and source impedances, the following
method can be used to calculate the basic matching parameters.
Step 1: Tune Out C
At a center frequency f
capacitance C
temporary inductor L
when C
C
L
IN
IN
0.1 F
= 1/{(2
= 2.5 pF. For example, at f
PADL, COM1, COM2
VPS1
IN
Match to 50
(Gain = 13 dB)
C
pF
140
133
95.0
71.0
66.5
57.0
47.5
40.7
35.6
31.6
28.5
23.7
17.8
14.2
11.9
9.5
7.1
5.7
4.75
4.07
3.57
3.16
2.85
AD8306
10
M
can be made to disappear by resonating with a
f
C
IN
)
10
2
IN
C
VPS2
C
, whose value is given by
IN
VLOG
, the shunt impedance of the input
} = 10
0.1 F
Table I.
L
nH
3500
3200
2250
1660
1550
1310
1070
904
779
682
604
489
346
262
208
155
104
75.3
57.4
45.3
36.7
30.4
25.6
M
(a)
10
5k
/f
AD8031
C
2
C
5k
10
= 100 MHz, L
0.1 F
(Gain = 10 dB)
C
pF
100.7
94.1
67.1
50.3
47.0
40.3
33.5
28.8
25.2
22.4
20.1
16.8
12.6
10.1
8.4
6.7
5.03
4.03
3.36
2.87
2.52
2.24
2.01
Figure 30. Altering the Logarithmic Slope
Match to 100
M
+5V
40mV/dB
IN
= 1 H.
L
nH
4790
4460
3120
2290
2120
1790
1460
1220
1047
912
804
644
448
335
261
191
125
89.1
66.8
52.1
41.8
34.3
28.6
M
(7)
–12–
Step 2: Calculate C
Now having a purely resistive input impedance, we can calculate
the nominal coupling elements C
For the AD8306, R
needed, at f
356 nH.
Step 3: Split C
Since we wish to provide the fully-balanced form of network
shown in Figure 28, two capacitors C1 = C2 each of nominally
twice C
a value of 14.24 pF in this example. Under these conditions, the
voltage amplitudes at INHI and INLO will be similar. A some-
what better balance in the two drives may be achieved when C1
is made slightly larger than C2, which also allows a wider range
of choices in selecting from standard values. For example, ca-
pacitors of C1 = 15 pF and C2 = 13 pF may be used (making
C
Step 4: Calculate L
The matching inductor required to provide both L
just the parallel combination of these:
With L
this example of a match of 50
nearest standard value of 270 nH may be used with only a slight
loss of matching accuracy. The voltage gain at resonance de-
pends only on the ratio of impedances, as is given by
Altering the Logarithmic Slope
Simple schemes can be used to increase and decrease the loga-
rithmic slope as shown in Figure 30. For the AD8306, only
power, ground and logarithmic output connections are shown;
refer to Figure 24 for complete circuitry. In Figure 30(a), the op
amp’s gain of +2 increases the slope to 40 mV/dB. In Figure
30(b), the AD8031 buffers a resistive divider to give a slope of
O
= 6.96 pF).
L
C
GAIN
0.1 F
M
O
IN
O
= L
PADL, COM1, COM2
, shown as C
= 1 H and L
2
VPS1
C
IN
AD8306
10
f
= 100 MHz, C
L
C
20
O
O
/(L
Into Two Parts
1
log
R R
10
IN
IN
O
VPS2
IN
M
VLOG
M
and L
+ L
is 1 k . Thus, if a match to 50
O
M
in the figure, can be used. This requires
R
R
0.1 F
= 356 nH, the value of L
O
IN
S
;
)
O
5k
5k
O
L
must be 7.12 pF and L
O
(b)
10
at 100 MHz is 262.5 nH. The
O
and L
log
R R
AD8031
2
IN
R
f
R
O
C
10
IN
S
, using
M
0.1 F
M
IN
10mV/dB
+5V
to complete
and L
O
must be
REV. A
is
O
(10)
is
(9)
(8)