AD8582AR Analog Devices Inc, AD8582AR Datasheet - Page 2

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AD8582AR

Manufacturer Part Number
AD8582AR
Description
Digital/Analog Converter IC Interface Type:Parallel
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD8582AR

Number Of Bits
12
Number Of Outputs
2
Package/case
24-SOIC-WIDE
Leaded Process Compatible
No
A/d, D/a Features
5 Volt, Parallel Input Complete Dual 12-Bit DAC
Rohs Status
RoHS non-compliant
Settling Time
16µs
Data Interface
Parallel
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
35mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Number Of Channels
2
Resolution
12b
Conversion Rate
62.5KSPS
Interface Type
Parallel
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
R-2R
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±2LSB
Single Supply Voltage (min)
4.75V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Package Type
SOIC W
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AD8582–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
STATIC PERFORMANCE
MATCHING PERFORMANCE
REFERENCE OUTPUT
ANALOG OUTPUT
DYNAMIC CHARACTERISTICS
LOGIC INPUTS
TIMING SPECIFICATIONS
SUPPLY CHARACTERISTICS
NOTES
1
2
3
4
5
6
7
Specifications subject to change without notice.
1 LSB = 1 mV for 0 V to +4.095 V output range.
Includes internal voltage reference error.
These parameters are guaranteed by design and not subject to production testing.
Very little sink current is available at the V
Settling time is not guaranteed for the first six codes 0 through 5.
All input control signals are specified with t
Power dissipation is a calculated value I
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage
Full-Scale Tempco
Linearity Matching Error
Output Voltage
Output Source Current
Line Rejection
Load Regulation
Output Current
Load Regulation at Half Scale
Capacitive Load
Crosstalk
Voltage Output Settling Time
Digital Feedthrough
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
Chip Select Pulse Width
DAC Select Setup
DAC Select Hold
Data Setup
Data Hold
Load Setup
Load Hold
Load Pulse Width
Reset Pulse Width
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
7
3, 6
DD
5
REF
R
3
5 V.
= t
pin. Use external buffer if setting up a virtual ground.
F
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
Symbol
N
INL
DNL
V
V
TCV
V
I
LN
LD
I
LD
C
C
t
F
V
V
I
C
t
t
t
t
t
t
t
t
t
I
P
PSS
REF
OUT
S
IL
CSW
AS
AH
DS
DH
LS
LH
LDW
RSW
DD
V
T
DISS
ZSE
FS
REF
IL
IH
L
T
IL
FS
REJ
REG
REG
A/B
FS
(@ V
DD
Condition
Note 1
Monotonic
Data = 000
Data = FFF
Notes 2 and 3
Note 4
I
Data = 800
R
No Oscillation
To 1 LSB of Final Value
Signal Measured at DAC Output, While
Changing Data (LDA = LDB = “1”)
Note 3
V
V
V
V
REF
V
= +5.0 V
L
IH
IL
IH
IL
DD
= 402
= 0 V, V
= 0 V, V
= 2.4 V, V
= 2.4 V, V
= 0 mA to 5 mA
= 5%
–2–
H
H
H
to , Data = 800
DD
DD
5%, R
,
2
IL
IL
3
= +5 V
= +5 V
= 0.8 V
= 0.8 V
L
= No Load, –40 C T
H
A
+85 C, unless otherwise noted)
Min
12
–2
–1
4.079
2.484
2.4
30
30
0
30
10
20
10
20
30
Typ
+0.2
4.095
2.500
1
500
>64
16
35
4
1
20
5
0.002
3/4
3/4
16
1
Max
+2
+1
+3
4.111
2.516
–5
0.08
0.1
3
0.8
10
10
7
2
35
10
0.004
5
REV. 0
Units
Bits
LSB
LSB
mV
V
ppm/ C
LSB
V
mA
%/V
%/mA
mA
LSB
pF
dB
nV s
V
V
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mW
mW
%/%
s
A

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