AD9216BCPZ-105 Analog Devices Inc, AD9216BCPZ-105 Datasheet - Page 24
![IC,A/D CONVERTER,DUAL,10-BIT,CMOS,LLCC,64PIN](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9216BCPZ-105
Manufacturer Part Number
AD9216BCPZ-105
Description
IC,A/D CONVERTER,DUAL,10-BIT,CMOS,LLCC,64PIN
Manufacturer
Analog Devices Inc
Datasheet
1.AD9216BCPZ-65.pdf
(40 pages)
Specifications of AD9216BCPZ-105
Number Of Bits
10
Sampling Rate (per Second)
105M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
330mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9216-80PCBZ - BOARD EVAL FOR AD9216 80MSPSAD9216-105PCBZ - BOARD EVAL FOR AD9216 105MSPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9216BCPZ-105
Manufacturer:
ADI
Quantity:
270
Part Number:
AD9216BCPZ-105
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9216
VOLTAGE REFERENCE
A stable and accurate 0.5 V voltage reference is built into
the AD9216. The input range can be adjusted by varying the
reference voltage applied to the AD9216, using either the inter-
nal reference with different external resistor configurations or
an externally applied reference voltage. The input span of the
ADC tracks reference voltage changes linearly.
Internal Reference Connection
A comparator within the AD9216 detects the potential at the
SENSE pin and configures the reference into three possible
states, which are summarized in Table 9. If SENSE is grounded,
the reference amplifier switch is connected to the internal resistor
divider (see Figure 47), setting VREF to 1 V. If a resistor divider
is connected, as shown in Figure 48, the switch is again set to the
SENSE pin. This puts the reference amplifier in a noninverting
mode with the VREF output defined as
Table 9. Reference Configuration Summary
Selected Mode
External Reference
Programmable Reference
Internal Fixed Reference
VREF = 0.5 × (1 + R2 / R1 )
SENSE Voltage
AVDD
0.2 V to VREF
AGND to 0.2 V
Rev. A | Page 24 of 40
Resulting VREF (V)
N/A
0.5 × (1 + R2/R1)
1.0
Note: The optimum performance is obtained with VREF =
1.0 V; performance degrades as VREF (and full scale) reduces
(see Figure 25). In all reference configurations, REFT and REFB
drive the ADC core and establish its input span. The input
range of the ADC always equals twice the voltage at the refer-
ence pin for either an internal or an external reference.
10µF
Figure 47. Internal Reference Configuration (One Channel Shown)
SENSE
0.1µF
VIN+
VIN–
VREF
Resulting Differential Span (V p-p)
2 × External Reference
2 × VREF (see Figure 48)
2.0
SELECT
LOGIC
AD9216
0.5V
CORE
ADC
REFB
REFT
0.1µF
0.1µF
0.1µF
10µF