AD9216 Analog Devices, AD9216 Datasheet
AD9216
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AD9216 Summary of contents
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... Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes GENERAL DESCRIPTION The AD9216 is a dual 10-bit, 105 MSPS analog-to-digital converter (ADC). It features dual high performance sample- and-hold amplifiers (SHAs) and an integrated voltage reference. The AD9216 uses a multistage differential pipelined archi- ...
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... AD9216 TABLE OF CONTENTS DC Specifications ............................................................................. 3 AC Specifications.............................................................................. 4 Logic Specifications.......................................................................... 5 Switching Specifications .................................................................. 6 Timing Diagram ............................................................................... 7 Absolute Maximum Ratings............................................................ 8 Explanation of Test Levels ........................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Terminology .................................................................................... 11 Typical Performance Characteristics ........................................... 13 Equivalent Circuits ......................................................................... 19 Theory of Operation ...................................................................... 20 Analog Input ............................................................................... 20 Clock Input and Considerations .............................................. 22 Power Dissipation and Standby Mode..................................... 22 Digital Outputs ...
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... V ±0.1 25°C I 216 240 25° 25°C V 3.0 25°C I -2.6 ±0.2 +2.6 -2.6 25°C I -0.4 ±0.1 +0.4 -0.4 25°C I -1.6 ±0.1 +1.6 -1.6 Rev Page AD9216 AD9216BCPZ-105 Typ Max Min Typ Max 10 Guaranteed Guaranteed ±0.3 +1.9 −2.2 ±0.3 +2.2 ±0.4 +1.6 −1.6 ±0.4 +1.6 ±0.4 +1.0 −1.0 ±0.5 +1.0 ±0.4 +0.9 −1.0 ±0.5 +1.0 ±0.5 +1.6 −2.5 ±1.0 +2.5 ± ...
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... Full IV −80.5 -65.8 25°C I −80.5 -68.7 25°C V −80.0 25°C V −79.5 Full IV 82.0 Full IV 65.1 79.5 25°C I 67.8 79.5 25°C V 79.0 25°C V 78.5 25°C V 71.0 25°C V 70.0 25°C V 300 25°C V −80.0 Rev Page −0.5 dBFS differential input, 1.0 V internal reference, AD9216BCPZ-80 AD9216BCPZ-105 Min Typ Max Min Typ 58.5 58.0 55.9 58.1 54.8 57.6 56.4 58.5 56.4 57.6 58.0 57.4 57.5 57.3 58.2 57.8 55.4 58.0 53.4 57.4 56.2 58.0 56.1 57.4 57.5 56.8 57.0 56.7 9.4 9.3 8.9 9.3 8.6 9.3 9.0 9.3 9.1 9.3 9.3 9.2 9 ...
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... Output voltage levels measured with 5 pF load on each output. = −0.5 dBFS differential input, 1.0 V internal reference, IN AD9216BCPZ-65 AD9216BCPZ-80 Min Typ Max Min 2.0 2.0 0.8 −10 +10 −10 −10 +10 −10 2 2.45 2.45 0.05 Rev Page AD9216 AD9216BCPZ-105 Typ Max Min Typ Max 2.0 0.8 0.8 +10 −10 +10 +10 −10 + 2.45 0.05 0.05 Unit V V µA µ ...
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... V internal reference, IN AD9216BCPZ-65 Test Level Min Typ Max 15.4 VI 4.6 VI 4.6 I 4.5 6.4 I 2.0 V 1 1 parameters. Rev Page AD9216BCPZ-80 AD9216BCPZ-105 Min Typ Max Min Typ Max 80 105 10 10 12.5 9.5 4.4 3.8 4.4 3.8 4.5 6.4 4.5 6.4 2.0 2.0 1.0 1.0 1.0 1 1.5 1.5 0.5 0 Unit MSPS ...
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... TIMING DIAGRAM N–1 ANALOG INPUT CLK DATA N–8 OUT N+1 N N+2 N N+4 N–7 N–6 N–5 N–4 N–3 Figure 2. Rev Page N+8 N+7 N+6 N+5 N–2 N– AD9216 ...
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... AD9216 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter ELECTRICAL AVDD DRVDD AGND AVDD Digital Outputs CLK_A, CLK_B, DCS, DFS, MUX_SELECT, OEB_A, OEB_B, SHARED_REF, PDWN_A, PDWN_B VIN−_A, VIN+_A, VIN−_B, VIN+_B REFT_A, REFB_A,VREF, REFT_B, REFB_B, SENSE 1 ENVIRONMENTAL Operating Temperature Junction Temperature Lead Temperature (10 sec) ...
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... AGND 1 PIN 1 INDICATOR 2 3 AGND 4 AVDD AD9216 VREF 8 TOP VIEW 9 (Not to Scale AVDD 12 AGND AGND 16 Figure 3. Pin Configuration Rev Page AD9216 48 D2_A 47 D1_A 46 D0_A (LSB) 45 DNC 44 DNC 43 DNC 42 DNC 41 DRVDD 40 DRGND 39 DNC 38 D9_B (MSB) 37 D8_B 36 D7_B 35 D6_B 34 ...
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... AD9216 Pin No. Mnemonic Description 46 to 51, D0_A (LSB) to Channel A Data Output Bits D9_A (MSB) 59 OEB_A Output Enable for Channel A. Logic 0 enables Data Bus A. Logic 1 sets outputs to High-Z. 60 PDWN_A Power-Down Function Selection for Channel A. Logic 0 enables Channel A. Logic 1 powers down Channel A. (Outputs static, not High-Z.) ...
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... Maximum Conversion Rate The encode rate at which parametric testing is performed. Output Propagation Delay The delay between a 50% crossing of the CLK rising edge and the time when all output data bits are within valid logic levels. Rev Page AD9216 − 1.76 dB ⎛ ⎞ ...
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... AD9216 Noise (for Any Range within the ADC) This value includes both thermal and quantization noise. − ⎛ FS SNR ⎜ ⎜ = × × dBm .001 10 noise ⎝ where the input impedance the full scale of the device for the frequency in question. ...
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... MSPS, A =70 MHz, 76 MHz (−80 Grade SNR = 57.5dB 70MHz ON SINAD = 57.3dB CHANNEL –85.9dBc ACTIVE H3 = –74.4dBc SFDR = 72.4dBc 76MHz CROSSTALK FROM CHANNEL FREQUENCY (MHz MSPS, A =70 MHz, 76 MHz (−65 Grade AD9216 35 36 (70 ...
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... AD9216 100 SNR 60 SINAD CLOCK FREQUENCY (MHz) Figure 10. SNR, SINAD, H2, H3, SFDR vs. Sample Clock Frequency MHz at −0.5 dBFS (−105 Grade) IN 100 SNR 60 SINAD CLOCK FREQUENCY (MHz) Figure 11. SNR, SINAD, H2, H3, SFDR vs. Sample Clock Frequency MHz at − ...
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... Figure 21. Two-Tone IMD Performance vs. Input Drive Level (69.1 MHz and 70.1 MHz; f Rev Page AD9216 TWO-TONE SFDR dBFS TWO-TONE SFDR dBc 70dB REF LINE –50 –40 –30 –20 –10 TWO-TONE ANALOG INPUT LEVEL (dBFS) = 105 MSPS (−105 Grade); F1, F2 Levels Equal) ...
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... AD9216 100 TWO-TONE SFDR dBFS 60 TWO-TONE SFDR dBc 70dB REF LINE –60 –50 –40 –30 TWO-TONE ANALOG INPUT LEVEL (dBFS) Figure 22. Two-Tone IMD Performance vs. Input Drive Level (100.1 MHz and 101.1 MHz 105 MSPS (−105 Grade); F1, F2 Levels Equal) ...
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... SNR SINAD 2.7 Figure 32. SNR, SINAD, SFDR vs. AVDD SNR 2.7 Figure 33. SNR, SINAD, SFDR vs. AVDD, A Rev Page AD9216 SFDR SNR SINAD 2.8 2.9 3.0 3.1 3.2 AVDD ( MHz at −0.5 dBFS, 105 MSPS IN (−105 Grade) SFDR SNR SINAD 2.8 2.9 3.0 3.1 3.2 AVDD ( MHz at −0.5 dBFS, 80 MSPS IN (− ...
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... AD9216 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 200 400 600 CODE Figure 34. Typical DNL Plot 10.3 MHz at −0.5 dBFS, 105 MSPS IN (−105 Grade) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 200 400 600 CODE Figure 35. Typical INL Plot 10.3 MHz at −0.5 dBFS, 105 MSPS IN (−105 Grade) 5.2 5.0 4.8 4.6 4.4 4.2 4.0 800 1000 – ...
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... EQUIVALENT CIRCUITS AVDD VIN+_A, VIN–_A, VIN+_B, VIN–_B Figure 37. Equivalent Analog Input AVDD CLK_A, CLK_B DCS, DFS, MUX_SELECT, SHARED_REF Figure 38. Equivalent Clock, Digital Inputs Circuit PDWN Figure 39. Power-Down Input DRVDD Figure 40. Digital Outputs Rev Page AD9216 AVDD 30kΩ ...
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... ANALOG INPUT The analog input to the AD9216 is a differential switched- capacitor SHA that has been designed for optimum perform- ance while processing a differential input signal. The SHA input accepts inputs over a wide common-mode range. An input common-mode voltage of midsupply is recommended to maintain optimal performance ...
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... For example p-p signal may be applied to VIN+, while reference is applied to VIN−. The AD9216 then accepts an input signal varying between 2 V and the single-ended configuration, distortion performance may degrade signifi- cantly as compared to the differential case. However, the effect is less noticeable at lower input frequencies. ...
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... Each speed grade dissipates a baseline power at low sample rates that increases with clock frequency. Either channel of the AD9216 can be placed into standby mode independently by asserting the PWDN_A or PDWN_B pins. Time to go into or come out of standby mode is 5 cycles maxi- mum when only one channel is being powered down ...
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... Figure 46. Example of Multiplexed Data Format Using the Channel A Output and the Same Clock Tied to CLK_A, CLK_B, and MUX_SELECT DATA FORMAT The AD9216 data output format can be configured for either Twos Complement twos complement or offset binary. This is controlled by the 01 1111 1111 data format select pin (DFS) ...
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... AD9216 VOLTAGE REFERENCE A stable and accurate 0.5 V voltage reference is built into the AD9216. The input range can be adjusted by varying the reference voltage applied to the AD9216, using either the inter- nal reference with different external resistor configurations or an externally applied reference voltage. The input span of the ADC tracks reference voltage changes linearly ...
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... The input span is always twice the value of the reference voltage; therefore, the external reference must be limited to a maximum the internal reference of the AD9216 is used to drive multiple converters to improve gain matching, the loading of the reference by the other converters must be considered ...
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... AD9216 DUAL ADC LFCSP PCB The PCB requires a low jitter clock source, analog sources, and power supplies. The PCB interfaces directly with ADI’s standard dual-channel data capture board (HSC-ADC-EVAL- DC), which together with ADI’s ADC Analyzer™ software allows for quick ADC evaluation. ...
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... Resistor Pack CTS 742C163470J Transformers T1-1WT AD9216/AD9238/AD9248 LFCSP-64 Transparent Latch/Buffer TSSOP-48 Inverter SC-70 XOR SO-14 Amp SO-8/EP Solder Bridge Rev Page AD9216 Value µF 1 0.1 µF, (C59, C61 µF 0.1 µF Wieland Wieland Samtec 1 36 Ω (All Ω, (R11, R51 100 Ω ...
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... AD9216 LFCSP PCB SCHEMATICS ENCA D7A D7_A 49 D8A D8_A 50 D9A D9_A 51 DRVDD2 52 DRGND2 53 D10A D10_A 54 D11A D11_A 55 D12A D12_A 56 D13A D13_A 57 OTRA OTR_A 58 OEB_A 59 PWDN_A 60 MUX_SEL 61 SH_REF 62 CLK_A 63 AVDD5 VD 64 EPAD 65 Figure 51. PCB Schematic ( Rev Page D7_B D7B ...
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... Figure 52. PCB Schematic ( Rev Page AD9216 ...
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... AD9216 ENCA ENCB Figure 53. PCB Schematic ( Rev Page ...
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... LFCSP PCB LAYERS Figure 54. PCB Top-Side Silkscreen Rev Page AD9216 ...
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... AD9216 Figure 55. PCB Top-Side Copper Routing Rev Page ...
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... Figure 56. PCB Ground Layer Rev Page AD9216 ...
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... AD9216 Figure 57. PCB Split Power Plane Rev Page ...
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... Figure 58. PCB Bottom-Side Copper Routing Rev Page AD9216 ...
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... AD9216 Figure 59. PCB Bottom-Side Silkscreen Rev Page ...
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... THERMAL CONSIDERATIONS The AD9216 LFCSP package has an integrated heat slug that improves the thermal and electrical properties of the package when locally attached to a ground plane at the PCB. A thermal (filled) via array to a ground plane beneath the part provides a path for heat to escape the package, lowering junction temperature ...
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... AD9216BCPZ-80 1 −40°C to +85°C 1 AD9216BCPZRL7-80 −40°C to +85°C 1 AD9216BCPZ-105 −40°C to +85°C 1 AD9216BCPZRL7-105 −40°C to +85°C 2 AD9216-80PCB AD9216-105PCB Pb-free part. 2 Supports AD9216-65 and AD9216-80 Evaluation. 9.00 BSC SQ 0.60 MAX 49 48 8.75 TOP BSC SQ VIEW 0.45 0. 0.35 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM ...
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... NOTES Rev Page AD9216 ...
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... AD9216 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04775–0–6/05(A) Rev Page ...