AD9222-65EBZ Analog Devices Inc, AD9222-65EBZ Datasheet - Page 35
![Octal 12 Bit, 65 MSPS Serial LVDS ADC EB](/photos/9/11/91140/ad9222-65ebz_sml.jpg)
AD9222-65EBZ
Manufacturer Part Number
AD9222-65EBZ
Description
Octal 12 Bit, 65 MSPS Serial LVDS ADC EB
Manufacturer
Analog Devices Inc
Datasheet
1.AD9222ABCPZRL7-50.pdf
(60 pages)
Specifications of AD9222-65EBZ
Number Of Adc's
8
Number Of Bits
12
Sampling Rate (per Second)
65M
Data Interface
Serial
Inputs Per Adc
2 Single
Input Range
2 Vpp
Power (typ) @ Conditions
910mW @ 65MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9222
Kit Application Type
Data Converter
Application Sub Type
ADC
Features
Serial LVDS, Data And Frame Clock Outputs, 325MHz Full-power Analog Bandwidth
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SCLK
Table 15. Serial Timing Definitions
Parameter
t
t
t
t
t
t
t
t
t
SDIO
DS
DH
CLK
S
H
HI
LO
EN_SDIO
DIS_SDIO
CSB
DON’T CARE
DON’T CARE
Timing (Minimum, ns)
5
2
40
5
2
16
16
10
10
t
S
R/W
t
DS
W1
W0
t
DH
A12
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge (not shown in Figure 84)
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK rising
edge (not shown in Figure 84)
A11
t
HI
A10
t
Figure 84. Serial Timing Details
LO
A9
Rev. D | Page 35 of 60
t
CLK
A8
A7
D5
D4
D3
D2
D1
D0
t
H
DON’T CARE
AD9222
DON’T CARE