AD9520-3BCPZ-REEL7 Analog Devices Inc, AD9520-3BCPZ-REEL7 Datasheet - Page 60
![12/24 Channel Clock Distribution W/ On-C](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9520-3BCPZ-REEL7
Manufacturer Part Number
AD9520-3BCPZ-REEL7
Description
12/24 Channel Clock Distribution W/ On-C
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9520-3BCPZ.pdf
(84 pages)
Specifications of AD9520-3BCPZ-REEL7
Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVPECL
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.25GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.25GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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AD9520-3
Table 47. Example of EEPROM Buffer Segment
Reg Addr (Hex)
Start EEPROM Buffer Segment
0xA00
0xA01
0xA02
0xA03
0xA04
0xA05
0xA06
0xA07
0xA08
0xA09
0xA0A
Bit 7 (MSB)
0
0
0
Bit 6
Rev. 0 | Page 60 of 84
Bit 5
Address [15:8] of second group of registers
Address [7:0] of second group of registers
Address [15:8] of third group of registers
Address [15:8] of first group of registers
Address [7:0] of third group of registers
Address [7:0] of first group of registers
End-of-data operational code (0xFF)
IO_UPDATE operational code (0x80)
Number of bytes [6:0] of second group of registers
Number of bytes [6:0] of third group of registers
Number of bytes [6:0] of first group of registers
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
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