AD9520-3BCPZ-REEL7 Analog Devices Inc, AD9520-3BCPZ-REEL7 Datasheet - Page 81
![12/24 Channel Clock Distribution W/ On-C](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9520-3BCPZ-REEL7
Manufacturer Part Number
AD9520-3BCPZ-REEL7
Description
12/24 Channel Clock Distribution W/ On-C
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9520-3BCPZ.pdf
(84 pages)
Specifications of AD9520-3BCPZ-REEL7
Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVPECL
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.25GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.25GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 60. EEPROM Control
Reg.
Addr
(Hex) Bit(s) Name
B00
B01
B02
B02
B03
[0]
[0]
[1]
[0]
[0]
STATUS_EEPROM
(read-only)
EEPROM
data error
(read-only)
Soft_EEPROM
Enable EEPROM
write
REG2EEPROM
Description
This read-only register indicates the status of the data transferred between the EEPROM and the buffer
register bank during the writing and reading of the EEPROM. This signal is also available at the STATUS pin
when 0x01D[7] is set.
[0] = 0; data transfer is done.
[0] = 1; data transfer is not done.
This read-only register indicates an error during the data transferred between the EEPROM and the buffer.
[0] = 0; no error. Data is correct.
[0] = 1; incorrect data detected.
When the EEPROM pin is tied low, setting Soft_EEPROM resets the AD9520 using the settings saved in
EEPROM.
[1] = 1; soft reset with EEPROM settings (self-clearing).
Enables the user to write to the EEPROM.
[0] = 0; EEPROM write protection is enabled. User cannot write to EEPROM (default).
[0] = 1; EEPROM write protection is disabled. User can write to EEPROM.
Transfers data from the buffer register to the EEPROM (self-clearing).
[0] = 1; setting this bit initiates the data transfer from the buffer register to the EEPROM (writing process);
it is reset by the I²C master after the data transfer is done.
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AD9520-3