AD9765-EBZ Analog Devices Inc, AD9765-EBZ Datasheet - Page 6

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AD9765-EBZ

Manufacturer Part Number
AD9765-EBZ
Description
12-Bit, 125 MSPS DUal TxDAC+
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheets

Specifications of AD9765-EBZ

Number Of Dac's
2
Number Of Bits
12
Outputs And Type
2, Differential
Sampling Rate (per Second)
125M
Data Interface
Parallel
Settling Time
35ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9765
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AN-555
TROUBLESHOOTING
The dual DAC evaluation board has been designed to
allow optimum performance from the AD9709, AD9763,
AD9765, AD9767. However, many factors can contribute
to suboptimal performance. The following is a list of
potential problems and their likely sources.
Problem—No signal or reduced signal on the output.
Is power applied correctly? Use an oscilloscope to verify
that the input data pins are switching and that the clock
is present on the input. Make sure that the output trans-
former is in place. Do the data input logic levels match
the DVDD being applied (3 V or 5 V)? Does the clock pass
through the input threshold, roughly one-half of DVDD?
If the internal reference is being used, make sure that
1.2 V is present at FSADJ1, FSADJ2 and REFIO. Make
sure that R9 and R10 are in place next to these test
points.
Problem—Signal and images appear at the DAC output
at twice or half the expected frequency.
The DAC is in the incorrect mode (Dual DAC or Interleav-
ing). Make sure that the mode select jumper in the top
right corner of the eval board is set to the correct posi-
tion. This jumper must be in one position or the other
and cannot be allowed to float.
–6–
Problem—Unusually high amount of noise on the output.
With an oscilloscope, verify the relative timing between
the data transition and the clock input as described in
the Clock Timing Performance section. Check to make
sure that the clock for the data source is synchronized
with the clock input to the DAC.
Problem—Can not match noise specifications from data sheet.
Is a low jitter clock being used? When generating a
single tone, does the spectrum analyzer show skirting
around the tone at the noise floor? This is a symptom of
clock jitter.
Problem—Can not match distortion spec.
Is the output signal from the DAC seeing 50 ? Is the
voltage on the output of the DAC within the compliance
range of 1 V? Is the DAC output overdriving the spec-
trum analyzer input? Try increasing the spectrum ana-
lyzer input attenuation to see if the distortion products
drop. If they do, the analyzer is being overdriven.
REV. 0

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