AD9861-50EBZ Analog Devices Inc, AD9861-50EBZ Datasheet - Page 35

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AD9861-50EBZ

Manufacturer Part Number
AD9861-50EBZ
Description
10 Bit, 50 MSPS MxFE Converter
Manufacturer
Analog Devices Inc
Type
ADC + DAC, Codec, Front End for RFr
Datasheet

Specifications of AD9861-50EBZ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
AD9861-50
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Configuring with SPI
The flexible interface can be configured with register settings. Using the register allows more device programmability. Table 16 shows the
required register writes to configure the AD9861 for FD, optional FD, HD20, optional HD20, HD10, optional HD10, and clone mode.
Note that for modes that use interleaved data buses, enabling 2× or 4× interpolation is required.
Table 16. Registers for Configuring SPI
Register Address
FD, Mode 1
Optional FD, Mode 2
HD20, Mode 4
Optional HD20, Mode 5
HD10, Mode 7
Optional HD10, Mode 8
Clone, Mode 10
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [4]
Register 0x14 [2]
Register 0x13 [1:0]
Register 0x01 [7:5]
Register 0x14 [0]
Register 0x13 [1:0]
Setting
[000];
High
High
[01] or [10]
[001]
High
High
[01] or [10]
[000];
Low
Low
[00], [01] or [10]
[011]
Low
Low
[00], [01] or [10]
[000]
Low
High
[01] or [10]
[101]
Low
High
[01] or [10]
[111]
High
[01] or [10]
Rev. 0 | Page 35 of 52
Description
clk_mode—Configures timing mode.
SpiFDnHD—Configures FD mode.
SpiB10n20—Configures FD mode.
Interpolation Control—Configures 2× or 4× interpolation.
clk_mode—Configures timing mode.
SpiFDnHD—Configures FD mode.
SpiB10n20—Configures FD mode.
Interpolation Control—Configures 2× or 4× interpolation.
clk_mode—Configures timing mode.
SpiB10n20—Configures HD20 mode.
clk_mode—Configures timing mode.
SpiB10n20—Configures HD20 mode.
clk_mode—Configures timing mode.
SpiB10n20—Configures HD10 mode.
Interpolation Control—Configures 2× or 4× interpolation.
clk_mode—Configures timing mode.
SpiB10n20—Configures HD10 mode.
Interpolation Control—Configures 2× or 4× interpolation.
clk_mode—Configures timing mode.
SpiClone—Configures clone mode.
Interpolation Control—Configures 2× or 4× interpolation.
SpiFDnHD—Configures HD mode.
Interpolation Control—Configures 1×, 2×, or 4× interpolation.
SpiFDnHD—Configures HD mode.
Interpolation Control—Configures 1×, 2×, or 4× interpolation.
SpiFDnHD—Configures HD mode.
SpiFDnHD—Configures HD mode.
AD9861

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