ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 122
![1-Phase Energy Meter IC](/photos/6/60/66065/505-64-lqfp_sml.jpg)
ADE7518ASTZF16-RL
Manufacturer Part Number
ADE7518ASTZF16-RL
Description
1-Phase Energy Meter IC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7518ASTZF16.pdf
(128 pages)
Specifications of ADE7518ASTZF16-RL
Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADE7518ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7518
I/O REGISTERS
Table 137. Extended Port Configuration SFR (EPCFG, 0x9F)
Bit
7
6
5
4
3
2
1
0
Table 138. Port 0 Weak Pull-Up Enable SFR (PINMAP0, 0xB2)
Bit
7
6
5
4
3
2
1
0
Table 139. Port 1 Weak Pull-Up Enable SFR (PINMAP1, 0xB3)
Bit
7
6
5
4
3
2
1
0
Table 140. Port 2 Weak Pull-Up Enable SFR (PINMAP2, 0xB4)
Bit
7 to 6
5
4
3
2
1
0
Mnemonic
MOD38_FP21
MOD38_FP22
MOD38_FP23
MOD38_TxD
MOD38_CF1
MOD38_SSb
MOD38_MISO
MOD38_CF2
Mnemonic
PINMAP0.7
PINMAP0.6
PINMAP0.5
PINMAP0.4
PINMAP0.3
PINMAP0.2
PINMAP0.1
PINMAP0.0
Mnemonic
PINMAP1.7
PINMAP1.6
PINMAP1.5
PINMAP1.4
PINMAP1.3
PINMAP1.2
PINMAP1.1
PINMAP1.0
Mnemonic
Reserved
PINMAP2.5
Reserved
PINMAP2.3
PINMAP2.2
PINMAP2.1
PINMAP2.0
Default
0
0
0
0
0
0
0
Default
0
0
0
0
0
0
0
0
Default
0
0
0
0
0
0
0
0
Default
0
0
0
0
0
0
0
0
Rev. 0 | Page 122 of 128
Description
Enable 38 kHz modulation on P1.6/FP21 pin.
Enable 38 kHz modulation on P1.5/FP22 pin.
Enable 38 kHz modulation on P1.4/T2/FP23 pin.
Enable 38 kHz modulation on P1.1/TxD pin.
Enable 38 kHz modulation on P0.2/CF1/RTCCAL pin.
Enable 38 kHz modulation on P0.7/SS/T1 pin.
Enable 38 kHz modulation on P0.5/MISO pin.
Enable 38 kHz modulation on P0.3/CF2 pin.
Description
The weak pull-up on P0.7 is disabled when this bit is set.
The weak pull-up on P0.6 is disabled when this bit is set.
The weak pull-up on P0.5 is disabled when this bit is set.
The weak pull-up on P0.4 is disabled when this bit is set.
The weak pull-up on P0.3 is disabled when this bit is set.
The weak pull-up on P0.2 is disabled when this bit is set.
The weak pull-up on P0.1 is disabled when this bit is set.
The weak pull-up on P0.0 is disabled when this bit is set.
Description
The weak pull-up on P1.7 is disabled when this bit is set.
The weak pull-up on P1.6 is disabled when this bit is set.
The weak pull-up on P1.5 is disabled when this bit is set.
The weak pull-up on P1.4 is disabled when this bit is set.
The weak pull-up on P1.3 is disabled when this bit is set.
The weak pull-up on P1.2 is disabled when this bit is set.
The weak pull-up on P1.1 is disabled when this bit is set.
The weak pull-up on P1.0 is disabled when this bit is set.
Description
Reserved. Should be left cleared.
The weak pull-up on RESET is disabled when this bit is set.
Reserved. Should be left cleared.
Reserved. Should be left cleared.
The weak pull-up on P2.2 is disabled when this bit is set.
The weak pull-up on P2.1 is disabled when this bit is set.
The weak pull-up on P2.0 is disabled when this bit is set.