ADIS16334/PCBZ Analog Devices Inc, ADIS16334/PCBZ Datasheet - Page 14
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ADIS16334/PCBZ
Manufacturer Part Number
ADIS16334/PCBZ
Description
ADIS16334/PCB EVAL. BD. PB Free
Manufacturer
Analog Devices Inc
Series
iSensor™r
Datasheet
1.ADIS16334BMLZ.pdf
(20 pages)
Specifications of ADIS16334/PCBZ
Sensor Type
Gyroscope, 3 Axis
Sensing Range
±75 ~ 300°/s
Interface
Serial
Sensitivity
0.0125°/sec/LSB
Embedded
No
Utilized Ic / Part
ADIS16334
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADIS16334
DIGITAL PROCESSING CONFIGURATION
Table 16. Digital Processing Registers
Register Name
SMPL_PRD
SENS_AVG
SAMPLE RATE
The internal sampling system produces new data in the output
data registers at a rate of 819.2 SPS. The SMPL_PRD register in
Table 17 provides two functional controls for internal sampling
and register update rates: SMPL_PRD[12:8] for decimation and
SMPL_PRD[0] for enabling the external clock option. The
decimation filter reduces the update rate, using an averaging
filter with a decimated output. These bits provide a binomial
control that divides the data rate by a factor of 2 every time this
number increases by 1. For example, set SMPL_PRD[12:8] =
00100 (DIN = 0xB704) to set the decimation factor to 16. This
reduces the update rate to 51.2 SPS and the bandwidth to 25 Hz.
Table 17. SMPL_PRD Bit Descriptions
Bit(s)
[15:13]
[12:8]
[7:1]
[0]
INPUT CLOCK CONFIGURATION
SMPL_PRD[0] provides a control for synchronizing the internal
sampling to an external clock source. Set SMPL_PRD[0] = 0
(DIN = 0xB600) to enable the external clock. See Table 2 and
Figure 4 for timing information.
DIGITAL FILTERING
The SENS_AVG register in Table 18 provides user controls for
the low-pass filter. This filter contains two cascaded averaging
filters that provide a Bartlett window, FIR filter response (see
Figure 19). For example, set SENS_AVG[2:0] = 100 (DIN = 0xB804)
to set each stage to 16 taps. When used with the default sample
rate of 819.2 SPS and zero decimation (SMPL_PRD[12:8] = 00000),
this value reduces the sensor bandwidth to approximately 16 Hz.
Description (Default = 0x0001)
Not used
Average/decimation rate setting, binomial
Not used
Clock: 1 = internal (819.2 SPS), 0 = external
0x36
Address
0x38
LOW-PASS, TWO-POLE (404Hz, 757Hz)
SENSOR
MEMS
LOW-PASS, SINGLE-POLE (330Hz)
ACCELEROMETERS
Sample rate control
Digital filtering and range control
Description
GYROSCOPES
LOW-PASS
FILTER
330Hz
Figure 19. Sampling and Frequency Response Block Diagram
EXTERNAL CLOCK ENABLED
BY SMPL_PRD[0] = 0
ADC
CLOCK
Rev. 0 | Page 14 of 20
N
1
B
B = SENS_AVG[2:0]
N
N
BARTLETT WINDOW
n = 1
B
B
N
= 2
= NUMBER OF TAPS
B
DYNAMIC RANGE
The SENS_AVG[10:8] bits provide three dynamic range settings
for this gyroscope. The lower dynamic range settings (±75°/sec
and ±150°/sec) limit the minimum filter tap sizes to maintain
resolution. For example, set SENS_AVG[10:8] = 010 (DIN =
0xB902) for a measurement range of ±150°/sec. Because this
setting can influence the filter settings, program SENS_AVG[10:8]
before programming SENS_AVG[2:0] if additional filtering is
required.
Table 18. SENS_AVG Bit Descriptions
Bits
[15:11]
[10:8]
[7:3]
[2:0]
(PER STAGE)
x(n)
FIR FILTER
B
–100
–120
–140
–20
–40
–60
–80
N
1
Figure 18. Bartlett Window, FIR Filter Frequency Response
B
0.001
0
n = 1
Description (Default = 0x0402)
Not used
Measurement range (sensitivity) selection
100 = ±300°/sec (default condition)
010 = ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02)
001 = ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04)
Not used
Number of taps in each stage; value of B in N
N
B
x(n)
N = 2
N = 4
N = 16
N = 64
DECIMATION
D = SMPL_PRD[12:8]
N
N
N
AVERAGE/
D
D
1
(Phase Delay = N Samples)
D
FILTER
= 2
= NUMBER OF TAPS
n = 1
N
D
0.01
D
x(n)
FREQUENCY (
÷N
D
f
/
f
S
)
0.1
B
= 2
1
B