ADM802LARNZ-REEL Analog Devices Inc, ADM802LARNZ-REEL Datasheet - Page 7

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ADM802LARNZ-REEL

Manufacturer Part Number
ADM802LARNZ-REEL
Description
5V CMOS UP I.C.
Manufacturer
Analog Devices Inc
Type
Battery Backup Circuitr
Datasheet

Specifications of ADM802LARNZ-REEL

Number Of Voltages Monitored
1
Output
Push-Pull, Totem Pole
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.65V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
If the watchdog timer is not needed, the WDI input should be
left floating.
The Power Fail Input, PFI, monitors the input power supply via
a resistive divider network. The voltage on the PFI input is
compared with a precision 1.25 V internal reference. If the input
voltage drops below 1.25 V, a power fail output (PFO) signal is
generated. This warns of an impending power failure and may
be used to interrupt the processor so that the system may be
shut down in an orderly fashion. The resistors in the sensing
network are ratioed to give the desired power fail threshold
voltage V
Alternate Watchdog Input Drive Circuits
The watchdog feature can be enabled and disabled under
program control by driving WDI with a 3-state buffer. When
three-stated, the WDI input will float thereby disabling the
watchdog timer.
High Capacity Backup Capacitors
High capacity (0.1 F or greater) capacitors may be used as a
backup power source. A typical application is shown in Fig-
ure 12.
REV. 0
T
.
0.1F
Figure 12. High Capacity Capacitor
+5V
+
V
T
R1/R2 = (V
= (1.25 R1/R2) + 1.25 V
V
V
CC
BATT
GND
*
FOR ADM805L/ADM805M ONLY
RESET
RESET
T
/1.25) – 1
V
OUT
*
TO STATIC RAM
TO µP
ADM690A/ADM692A/ADM802L/M/ADM805L/M
–7–
Operation Without a Backup Supply
If a backup power source is not used, V
nected to GND and V
Replacing the Backup Battery
The backup battery may be replaced without any danger of
spurious resetting when V
reset threshold, a reset will not occur even if V
while a replacement battery is being inserted. This differs from
older generation products where leakage currents flowing out
V
In order to prevent contention for microprocessors with a
bidirectional reset line, a current limiting resistor should be
inserted between the ADM69xA/ADM80xx RESET output pin
and the P reset pin. This will limit the current to a safe level if
there are conflicting output reset levels. A suitable resistor value
is 4.7 k . If the reset output is required for other uses, then it
should be buffered as shown in Figure 13.
BATT
Ps With Bidirectional RESET
could cause spurious resetting during battery replacement.
Figure 13. Bidirectional Reset
ADM690A
ADM692A
ADM802M
ADM802L
GND
+5V
V
CC
OUT
RESET
CC
should be connected to V
is present. Since V
RESET
BATT
BUFFERED
RESET
GND
µP
should be con-
BATT
CC
is above the
is floating
CC
.

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