ADN2811ACPZ-CML Analog Devices Inc, ADN2811ACPZ-CML Datasheet - Page 2

S/Rate 2.5/2.7Gbps CDR/ PA Low Power I.C

ADN2811ACPZ-CML

Manufacturer Part Number
ADN2811ACPZ-CML
Description
S/Rate 2.5/2.7Gbps CDR/ PA Low Power I.C
Manufacturer
Analog Devices Inc
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of ADN2811ACPZ-CML

Output
CML
Frequency - Max
2.7GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.7GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Input
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADN2811
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Pin Configuration and Functional Descriptions.......................... 6
Definition of Terms .......................................................................... 8
Theory of Operation ...................................................................... 10
Functional Description .................................................................. 12
REVISION HISTORY
5/04—Data Sheet Changed from Rev. A to Rev. B
Updated Format.................................................................. Universal
Changes to Table 6 and Table 7......................................................13
Updated Outline Dimensions ........................................................19
Changes to Ordering Guide ...........................................................19
12/02—Data Sheet Changed from Rev. 0 to Rev. A.
Change to FUNCTIONAL DESCRIPTION Reference Clock ..10
Updated OUTLINE DIMENSIONS .............................................16
Thermal Characteristics .............................................................. 5
ESD Caution.................................................................................. 5
Maximum, Minimum, and Typical Specifications ................... 8
Input Sensitivity and Input Overdrive....................................... 8
Single-Ended vs. Differential ...................................................... 8
LOS Response Time ..................................................................... 9
Jitter Specifications....................................................................... 9
Clock and Data Recovery .......................................................... 12
Rev. B | Page 2 of 20
Applications Information .............................................................. 15
Outline Dimensions ....................................................................... 19
Limiting Amplifier ..................................................................... 12
Slice Adjust .................................................................................. 12
Loss of Signal (LOS) Detector .................................................. 12
Reference Clock.......................................................................... 12
Lock Detector Operation .......................................................... 13
Squelch Mode ............................................................................. 14
Test Modes: Bypass and Loopback........................................... 14
PCB Design Guidelines ............................................................. 15
Choosing AC-Coupling Capacitors ......................................... 17
DC-Coupled Application .......................................................... 18
LOL Toggling during Loss of Input Data................................ 18
Ordering Guide .......................................................................... 19

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