ADP1871ACPZ-1.0-R7 Analog Devices Inc, ADP1871ACPZ-1.0-R7 Datasheet - Page 4

• Manufacturer Part Number: ADP1871ACPZ-1.0-R7
• Description: 1.0MHz, Light Load Eff Enabled
• Manufacturer: Analog Devices Inc

Specifications of ADP1871ACPZ-1.0-R7

• Frequency - Max: 1MHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 45%
• Voltage - Supply: 2.95 V ~ 20 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-WFDFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP1871ACPZ-1.0-R7; ADP1871ACPZ-1.0-R7TR

ADP1870/ADP1871
Parameter
OUTPUT DRIVER CHARACTERISTICS
PRECISION ENABLE THRESHOLD
COMP VOLTAGE
THERMAL SHUTDOWN
1
2
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure
MOSFETs being Infineon BSC042N03MSG.
Not automatic test equipment (ATE) tested.
ADP1870ARMZ-0.6/
ADP1870ARMZ-1.0/
High-Side Driver
Low-Side Driver
Propagation Delays
SW Leakage Current
Integrated Rectifier
Logic High Level
Enable Hysteresis
COMP Clamp Low Voltage
COMP Clamp High Voltage
COMP Zero Current Threshold
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Hiccup Current Limit Timing
ADP1871ARMZ-0.6 (600 kHz)
On-Time
Minimum On-Time
Minimum Off-Time
ADP1871ARMZ-1.0 (1.0 MHz)
On-Time
Minimum On-Time
Minimum Off-Time
Output Source Resistance
Output Sink Resistance
Rise Time
Fall Time
Output Source Resistance
Output Sink Resistance
Rise Time
Fall Time
DRVL Fall to DRVH Rise
DRVH Fall to DRVL Rise
Channel Impedance
2
2
2
2
2
2
Symbol
V
t
t
t
t
t
t
I
V
V
T
SWLEAK
r,DRVH
f,DRVH
r,DRVL
f,DRVL
tpdhDRVH
tpdhDRVL
TMSD
COMP(low)
COMP(high)
COMP_ZCT
Conditions
V
V
65% duty cycle (maximum)
V
V
45% duty cycle (maximum)
I
I
V
V
I
I
V
V
V
V
V
I
V
V
From disabled state, release COMP/EN pin to enable
device (2.75 V ≤ V
(2.75 V ≤ V
(2.75 V ≤ V
Rising temperature
SOURCE
SINK
SOURCE
SINK
SINK
IN
IN
IN
IN
BST
BST
REG
REG
BST
BST
BST
IN
IN
= 5 V, V
= 20 V, V
= 5 V, V
= 20 V
= 2.9 V to 20 V, V
= 2.9 V to 20 V, V
= 1.5 A, 100 ns, negative pulse (5 V to 0 V)
= 1.5 A, 100 ns, negative pulse (5 V to 0 V)
= 10 mA
− V
− V
− V
− V
= 25 V, V
= 5.0 V, C
= 5.0 V, C
= 1.5 A, 100 ns, positive pulse (0 V to 5 V)
= 1.5 A, 100 ns, positive pulse (0 V to 5 V)
SW
SW
SW
SW
Rev. A | Page 4 of 44
= 4.4 V, C
= 4.4 V, C
= 4.4 V (see Figure 60)
= 4.4 V (see Figure 61)
OUT
OUT
REG
REG
OUT
SW
IN
IN
= 2 V, T
= 2 V, T
≤ 5.5 V)
≤ 5.5 V)
= 0.8 V
= 20 V, V
= 4.3 nF (see Figure 61)
= 4.3 nF (see Figure 60)
REG
IN
IN
REG
REG
J
J
≤ 5.5 V)
= 4.3 nF (see Figure 60)
= 4.3 nF (see Figure 61)
= 25°C
= 25°C
= 2.75 V to 5.5 V
= 2.75 V to 5.5 V
REG
= 5 V
60
and Figure 61), C
GATE
= 4.3 nF, and the upper- and lower-side
Min
500
285
245
0.47
Typ
600
540
82
340
1.0
312
60
340
2.25
0.7
25
11
1.6
0.7
18
16
15.4
18
22
285
37
1.07
155
15
6
Max
580
110
400
340
85
400
3
1
2.2
1
110
330
2.55
Unit
kHz
ns
ns
ns
MHz
ns
ns
ns
Ω
Ω
ns
ns
Ω
Ω
ns
ns
ns
ns
μA
Ω
mV
mV
V
V
V
°C
°C
ms