ADSP-21065LCSZ-240 Analog Devices Inc, ADSP-21065LCSZ-240 Datasheet - Page 37

ADSP-21065L 60 Mhz

ADSP-21065LCSZ-240

Manufacturer Part Number
ADSP-21065LCSZ-240
Description
ADSP-21065L 60 Mhz
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Fixed/Floating Pointr
Datasheet

Specifications of ADSP-21065LCSZ-240

Interface
Host Interface, Serial Port
Clock Rate
60MHz
Non-volatile Memory
External
On-chip Ram
64kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
Device Core Size
32b
Architecture
Enhanced Harvard
Format
Floating Point
Clock Freq (max)
60MHz
Mips
60
Device Input Clock Speed
60MHz
Ram Size
68KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.13V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
Package Type
MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADS-P21065LCSZ240
ADS-P21065LCSZ240

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21065LCSZ-240
Manufacturer:
AD
Quantity:
310
Part Number:
ADSP-21065LCSZ-240
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Capacitive Loading
Output delays and holds are based on standard capacitive loads:
50 pF on all pins. The delay and hold specifications given
should be derated by a factor of l.8 ns/50 pF for loads other
than the nominal value of 50 pF. Figure 28 and Figure 29 show
how output rise time varies with capacitance. Figure 30 shows
graphically how output delays and hold vary with load capaci-
tance. (Note that this graph or derating does not apply to output
disable delays; see the previous section Output Disable time
under Test Conditions.) The graphs of Figure 28, Figure 29,
and Figure 30 may not be linear outside the ranges shown.
REV. C
Figure 28. Typical Rise and Fall Time (10%–90% V
18
16
14
12
10
8
6
4
2
0
0
20
40
60
LOAD CAPACITANCE – pF
RISE TIME
80
100
120
FALL TIME
140
160
180
200
DD
)
–37–
Figure 29. Typical Rise and Fall Time (0.8 V–2.0 V)
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
–1
–2
6
5
4
3
2
1
0
0
0
0
Figure 30. Typical Output Delay or Hold
20
20
40
40
60
60
LOAD CAPACITANCE – pF
LOAD CAPACITANCE – pF
RISE TIME
80
80
100
100
120
120
ADSP-21065L
FALL TIME
140
140
160
160
180
180
200
200

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