ADUM1301WSRWZ-RL Analog Devices Inc, ADUM1301WSRWZ-RL Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
ADUM1301WSRWZ-RL
Manufacturer Part Number
ADUM1301WSRWZ-RL
Description
3-5.5V DC 1Mbit/sc 3Chnl Dgtl 2Txr1Rxr
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet
1.ADUM1300BRWZ.pdf
(28 pages)
Specifications of ADUM1301WSRWZ-RL
Inputs - Side 1/side 2
2/1
Number Of Channels
3
Isolation Rating
2500Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
1Mbps
Propagation Delay
100ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 125°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
over the entire recommended operation range, unless otherwise noted; all typical specifications are at T
These specifications apply to ADuM1300W and ADuM1301W automotive grade versions.
Table 6.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1300W, Total Supply Current, Three Channels
ADuM1301W, Total Supply Current, Three Channels
For All Models
ADuM130xWSRWZ
ADuM130xWTRWZ
10 Mbps (TRWZ Grade Only)
DC to 2 Mbps
10 Mbps (TRWZ Grade Only)
DC to 2 Mbps
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching, Codirectional
Channel-to-Channel Matching, Opposing-
Channels
V
V
V
V
V
V
V
V
Change vs. Temperature
Directional Channels
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
6
4
5
3
4
2
3
6
6
5
PLH
PLH
− t
− t
PHL
PHL
7
|
|
4
4
1
2
Symbol
I
I
I
I
I
I
I
I
I
I
I
V
V
V
V
PW
t
PWD
t
t
PW
t
PWD
t
t
t
DDI (Q)
DDO (Q)
DD1 (Q)
DD2(Q)
DD1 (10)
DD2 (10)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
IA
PHL
PSK
PSKCD
PHL
PSK
PSKCD
PSKOD
IH
IL
OAH
OAL
, I
, V
, V
, t
, t
IB
, V
, V
, I
EL
EH
PLH
PLH
/t
IC
OBH
OBL
PSKOD
, I
, V
, V
E1
Rev. H | Page 15 of 28
DD1
, I
OCH
OCL
E2
≤ 5.5 V, 3.0 V ≤ V
V
V
Min
−10
2.0
1
50
10
20
DD1
DD1
, V
, V
DD2
DD2
− 0.1 V
− 0.4 V
Typ
0.50
0.11
1.6
0.4
6.5
1.1
1.3
0.6
5.0
1.8
+0.01
V
0.0
0.04
0.2
70
30
5
DD2
DD1
DD1
DD2
≤ 3.6 V; all minimum/maximum specifications apply
, V
,
− 0.2
1
DD2
Max Unit
0.53
0.15
2.5
0.7
8.1
1.6
2.1
0.9
6.2
2.5
+10
0.8
0.1
0.1
0.4
1000 ns
100
40
50
50
100
40
3
6
3
22
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
Mbps
ns
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ADuM1300/ADuM1301
A
= 25°C; V
Test Conditions
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
0 ≤ V
0 ≤ V
I
I
I
I
I
C
C
C
C
C
C
C
C
C
C
C
C
C
C
Ox
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
L
L
L
L
L
L
L
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
IA
E1
DD1
,V
,V
IB
E2
, V
= 5 V, V
≤ V
IC
Ix
Ix
≤ V
DD1
Ix
= V
Ix
Ix
= V
= V
= V
= V
DD1
or V
IxL
IxL
DD2
IxH
IxL
IxH
or V
DD2
= 3.0 V.
DD2
,