ADUM3160BRWZ-RL Analog Devices Inc, ADUM3160BRWZ-RL Datasheet - Page 11
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ADUM3160BRWZ-RL
Manufacturer Part Number
ADUM3160BRWZ-RL
Description
2.5kVFull/Low Speed USB Digital Isolator
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet
1.ADUM3160BRWZ.pdf
(16 pages)
Specifications of ADUM3160BRWZ-RL
Operating Temperature
-40°C ~ 105°C
Inputs - Side 1/side 2
2/2
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
3 V ~ 5.5 V
Data Rate
12Mbps
Propagation Delay
70ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
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Manufacturer:
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COMPATIBILITY OF UPSTREAM APPLICATIONS
The ADuM3160 is designed specifically for isolating a USB
peripheral. However, the chip does have two USB interfaces that
meet the electrical requirements for driving USB cables. This
opens the possibility of implementing isolation in downstream
USB ports such as isolated cables, which have generic connections
to both upstream and downstream devices, as well as isolating
host ports.
In a fully compliant application, a downstream facing port must
be able to detect whether a peripheral is low speed or full speed
based on the application of the upstream pull-up. The buffers
and logic conventions must adjust to match the requested speed.
Because the ADuM3160 sets its speed by hardwiring pins, the
part cannot adjust to different peripherals on the fly.
The practical result of using the ADuM3160 in a host port is
that the port works at a single speed. This behavior is acceptable
in embedded host applications; however, this type of interface is
not fully compliant as a general-purpose USB port.
Isolated cable applications have a similar issue. The cable operates
at the preset speed only; therefore, treat cable assemblies as
custom applications, not general-purpose isolated cables.
POWER SUPPLY OPTIONS
In most USB transceivers, 3.3 V is derived from the 5 V USB
bus through an LDO regulator. The ADuM3160 includes internal
LDO regulators on both the upstream and downstream sides.
The output of the LDO is available on the V
In some cases, especially on the peripheral side of the isolation,
there may not be a 5 V power supply available. The ADuM3160
has the ability to bypass the regulator and run on a 3.3 V supply
directly.
Two power pins are present on each side, V
is supplied to V
the xD+ and xD− drivers. V
3.3 V supply to allow external bypass as well as bias for external
pull-ups. If only 3.3 V is available, it can be supplied to both
V
coupler directly from the 3.3 V supply.
Figure 5 shows how to configure a typical application when the
upstream side of the coupler receives power directly from the
USB bus and the downstream side is receiving 3.3 V from the
peripheral power supply. The downstream side can run from a
5V V
manner as V
BUSx
BUS2
and V
power supply as well. It can be connected in the same
DDx
BUS1
. This disables the regulator and powers the
BUSx
, as shown in Figure 5, if needed.
, an internal regulator creates 3.3 V to power
DDx
provides external access to the
BUSx
DD1
and V
and V
DDx
DD2
. If 5 V
pins.
Rev. A | Page 11 of 16
PC BOARD LAYOUT
The ADuM3160 digital isolator requires no external interface
circuitry for the logic interfaces. For full speed operation, the
D+ and D− lines on each side of the device requires a 24 Ω ±
1% series termination resistor. These resistors are not required
for low speed applications. Power supply bypassing is required
at the input and output supply pins (see Figure 5). Install bypass
capacitors between V
capacitor value should have a minimum value of 0.1 µF and low
ESR. The total lead length between both ends of the capacitor
and the power supply pin should not exceed 10 mm.
Bypassing between Pin 2 and Pin 8 and between Pin 9 and Pin
15 should also be considered unless the ground pair on each
package side is connected close to the package. All logic level
signals are 3.3 V and should be referenced to the local V
or 3.3 V logic signals from an external source.
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout should be
designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins to exceed the device
Absolute Maximum Ratings, thereby leading to latch-up or
permanent damage.
DC CORRECTNESS AND MAGNETIC FIELD
IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the trans-
former. The decoder is bistable and is, therefore, either set or
reset by the pulses, indicating input logic transitions.
The limitation on the magnetic field immunity of the ADuM3160
is set by the condition in which induced voltage in the trans-
former’s receiving coil is sufficiently large to either falsely set or
reset the decoder. The following analysis defines the conditions
under which this may occur. The 3 V operating condition of the
ADuM3160 is examined because it represents the most suscep-
tible mode of operation.
V
PDEN
GND
GND
V
Figure 5. Suggested Printed Circuit Board Layout Example
BUS1
SPU
UD+
V
V
UD–
DD1
BUS1
DD1
1
1
= 3.3V OUTPUT
= 5.0V INPUT
BUSx
and V
ADuM3160
DDx
on each side of the chip. The
V
V
BUS2
DD2
= 3.3V INPUT
= 3.3V INPUT
ADuM3160
V
GND
V
SPD
PIN
DD–
DD+
GND
BUS2
DD2
2
2
DDx
pin