ADUM3300BRWZ-RL Analog Devices Inc, ADUM3300BRWZ-RL Datasheet - Page 8
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ADUM3300BRWZ-RL
Manufacturer Part Number
ADUM3300BRWZ-RL
Description
IC,Digital Coupler,CMOS,SOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet
1.ADUM3300ARWZ.pdf
(20 pages)
Specifications of ADUM3300BRWZ-RL
Inputs - Side 1/side 2
3/0
Number Of Channels
3
Isolation Rating
2500Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
10Mbps
Propagation Delay
32ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 105°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuM3300/ADuM3301
Parameter
SWITCHING SPECIFICATIONS
For All Models
ADuM330xARWZ
ADuM330xBRWZ
ADuM330xCRWZ
90 Mbps (CRW Grade Only)
Input Currents
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Opposing-Directional Channels
Codirectional Channels
Opposing-Directional Channels
V
Logic High Output Voltages
Logic Low Output Voltages
Change vs. Temperature
Codirectional Channels
Change vs. Temperature
V
Logic High Input Threshold
Logic Low Input Threshold
DD2
DD1
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
Supply Current
Supply Current
4
4
4
3
3
3
2
2
2
5
5
5
PLH
PLH
PLH
6
6
− t
− t
− t
PHL
PHL
PHL
6
|
|
|
4
4
4
6
6
Symbol
I
I
I
I
V
V
V
V
V
V
PW
t
PWD
t
t
PW
t
PWD
t
t
t
PW
t
PWD
t
t
t
DD1 (90)
DD2 (90)
IA
ID
PHL
PSK
PSKCD/OD
PHL
PSK
PSKCD
PSKOD
PHL
PSK
PSKCD
PSKOD
IH
IL
OAH
OCH
OAL,
OCL
, I
, I
, V
, V
, t
, t
, t
IB
E1
, V
, V
, V
, I
V
EL
, I
EH
PLH
PLH
PLH
OBL,
IC
ODL
OBH
ODH
E2
,
Rev. A | Page 8 of 20
,
(V
V
(V
V
Min
−10
2.0
1.6
1
50
10
15
90
20
DD2
DD2
DD1
DD1
) − 0.1
) − 0.4
or
or
Typ
41
22
15
28
+0.01
(V
(V
V
0.0
0.04
0.2
70
35
5
8.3
120
30
0.5
3
DD2
DD1
DD1
) − 0.2
or V
or
DD2
)
Max Unit
57
31
21
41
+10
0.8
0.4
0.1
0.1
0.4
1000 ns
100
40
50
50
100
50
3
22
3
6
11.1
40
2
14
2
5
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
V
V
Mbps
ns
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
Test Conditions
45 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
0 V ≤ V
0 V ≤ V
I
I
I
I
I
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
Ox
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
IA
E1
,V
,V
IB
E2
, V
≤ V
Ix
IC
Ix
Ix
,V
= V
Ix
Ix
= V
= V
DD1
ID
= V
= V
IxL
≤ V
IxL
IxH
or V
IxL
IxH
DD1
DD2
or V
DD2
,