AM29LV160DB-70EC Spansion Inc., AM29LV160DB-70EC Datasheet - Page 12
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AM29LV160DB-70EC
Manufacturer Part Number
AM29LV160DB-70EC
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheet
1.AM29LV160DB-70EC.pdf
(52 pages)
Specifications of AM29LV160DB-70EC
Memory Configuration
2M X 8 / 1M X 16 Bit
Package/case
48-TSOP
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Access Time, Tacc
70nS
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
AMD
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sectors of memory), the system must drive WE# and
CE# to V
For program operations, the BYTE# pin determines
whether the device accepts program data in bytes or
words. Refer to “Word/Byte Configuration” for more
information.
The device features an Unlock Bypass mode to facili-
tate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four. The
“Word/Byte Program Command Sequence” section
has details on programming data to the device using
b o t h s t a n d a r d a n d U n l o ck B y p a s s c o m m a n d
sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. Tables 2 and 3 indicate the
address space that each sector occupies. A “sector
address” consists of the address bits required to
uniquely select a sector. The “Command Definitions”
section has details on erasing a sector or the entire
chip, or suspending/resuming the erase operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in
this mode. Refer to the “Autoselect Mode” and “Au-
toselect Command Sequence” sections for more
information.
I
tive current specification for the write mode. The “AC
Characteristics” section contains timing specification
tables and timing diagrams for write operations.
Program and Erase Operation Status
During an erase or program operation, the system
may check the status of the operation by reading the
status bits on DQ7–DQ0. Standard read cycle timings
CC2
10
in the DC Characteristics table represents the ac-
IL
, and OE# to V
IH
.
D A T A
Am29LV160D
S H E E T
and I
eration Status” for more information, and to “AC
Characteristics” for timing diagrams.
Standby Mode
When the system is not reading or writing to the de-
vice, it can place the device in the standby mode. In
this mode, current consumption is greatly reduced,
and the outputs are placed in the high impedance
state, independent of the OE# input.
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at V
(Note that this is a more restricted voltage range than
V
within V
mode, but the standby current will be greater. The de-
vice requires standard access time (t
access when the device is in either of these standby
modes, before it is ready to read data.
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
In the DC Characteristics table, I
sents the standby current specification.
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device
energy consumption. The device automatically
enables this mode when addresses remain stable for
t
independent of the CE#, WE#, and OE# control
signals. Standard address access timings provide new
data when addresses are changed. While in sleep
mode, output data is latched and always available to
the system. I
repr esen ts th e automatic sleep mo de cu rren t
specification.
A C C
IH
.) If CE# and RESET# are held at V
CC
+ 3 0 n s . T h e a u t o m a t i c s l e e p m o d e i s
CC
read specifications apply. Refer to “Write Op-
± 0.3 V, the device will be in the standby
CC4
in the DC Characteristics table
CC3
May 5, 2006 22358B7
and I
CE
CC
IH
CC4
) for read
, but not
± 0.3 V.
repre-