CS4351-CZZR Cirrus Logic Inc, CS4351-CZZR Datasheet - Page 5

• Manufacturer Part Number: CS4351-CZZR
• Description: IC,D/A CONVERTER,DUAL,24-BIT,TSSOP,20PIN
• Manufacturer: Cirrus Logic Inc

DS566F1
1. PIN DESCRIPTION
SDIN
SCLK
LRCK
MCLK
VD
GND
RST
VA
VBIAS
VQ
VA_H
VL
BMUTEC
AMUTEC
AOUTB
AOUTA
Control Port Definitions
SCL/CCLK
SDA/CDIN
AD0/CS
Stand-Alone Definitions
DIF0
DIF1
DEM
Pin Name
16
10
11
12
13
17
20
14
19
15
18
#
1
2
3
4
5
6
7
8
9
8
7
9
DIF1(SCL/CCLK)
DIF0(SDA/CDIN)
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
Serial Clock (Input) - Serial clock for the serial audio interface.
Left / Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial
audio data line.
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
Digital Power (Input) - Positive power supply for the digital section.
Ground (Input) - Ground reference.
Reset (Input) - Powers down device and resets all internal resisters to their default settings when
enabled.
Low Voltage Analog Power (Input) - Positive power supply for the analog section.
Positive Voltage Reference (Output) - Positive reference voltage for the internal DAC.
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
High Voltage Analog Power (Input) - Positive power supply for the analog section.
Serial Audio Interface Power (Input) - Positive power for the serial audio interface
Mute Control (Output) - Control signal for optional mute circuit.
Analog Outputs (Output) - The full scale analog line output level is specified in the Analog Character-
istics table.
Serial Control Port Clock (Input) - Serial clock for the control port interface.
Serial Control Data (Input/Output) - Input/Output for I²C data. Input for SPI data.
Address Bit 0 / Chip Select (Input) - Chip address bit in I²C Mode. Control Port enable in SPI Mode.
Digital Interface Format (Input) - Defines the required relationship between the Left Right Clock,
Serial Clock, and Serial Audio Data.
De-emphasis (Input) - Selects the standard 15 µs/50 µs digital de-emphasis filter response for 44.1
kHz sample rates
DEM(AD0/CS)
MCLK
LRCK
SCLK
SDIN
GND
RST
VD
1
2
3
4
5
6
7
8
9
10
Pin Description
20
19
18
17
16
15
14
13
12
11
VL
AMUTEC
AOUTA
VA_H
GND
AOUTB
BMUTEC
VQ
VBIAS
VA
CS4351
5