CS4351-CZZ Cirrus Logic Inc, CS4351-CZZ Datasheet
CS4351-CZZ
Specifications of CS4351-CZZ
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CS4351-CZZ Summary of contents
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... The CS4351 is available in a 20-pin TSSOP package in both Commercial (-10°C - +70°C) and Automotive grades (-40°C to +85°C). The CDB4351 Customer Demonstration board is also available for device evalu- ation and implementation suggestions. Please see “ ...
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... De-Emphasis Control (DEM1:0) Bits 3-2. ........................................................................ 24 6.2.3 Functional Mode (FM) Bits 1-0 ......................................................................................... 25 6.3 Volume Mixing and Inversion Control - Register 03h ................................................................... 25 6.3.1 Channel A Volume = Channel B Volume (VOLB=A) Bit 7 ............................................... 25 6.3.2 Invert Signal Polarity (Invert_A) Bit 6 ............................................................................... 25 6.3.3 Invert Signal Polarity (Invert_B) Bit 5 ............................................................................... 25 2 CS4351 ® FORMAT ........................................... 11 DS566F1 ...
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... Figure 21.Double-Speed (fast) Stopband Rejection .................................................................................. 32 Figure 22.Double-Speed (fast) Transition Band......................................................................................... 32 Figure 23.Double-Speed (fast) Transition Band (detail)............................................................................. 32 Figure 24.Double-Speed (fast) Passband Ripple....................................................................................... 32 Figure 25.Double-Speed (slow) Stopband Rejection ................................................................................. 33 Figure 26.Double-Speed (slow) Transition Band ....................................................................................... 33 Figure 27.Double-Speed (slow) Transition Band (detail) ........................................................................... 33 Figure 28.Double-Speed (slow) Passband Ripple ..................................................................................... 33 DS566F1 CS4351 3 ...
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... Figure 35.Quad-Speed (slow) Transition Band (detail).............................................................................. 34 Figure 36.Quad-Speed (slow) Passband Ripple........................................................................................ 34 LIST OF TABLES Table 1. CS4351 Auto-Detect .................................................................................................................... 15 Table 2. CS4351 Mode Select ................................................................................................................... 15 Table 3. Single-Speed Mode Standard Frequencies ................................................................................. 16 Table 4. Double-Speed Mode Standard Frequencies................................................................................ 16 Table 5. Quad-Speed Mode Standard Frequencies .................................................................................. 16 Table 6. Digital Interface Format - Stand-Alone Mode............................................................................... 16 Table 7 ...
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... Serial Clock, and Serial Audio Data. De-emphasis (Input) - Selects the standard 15 µs/50 µs digital de-emphasis filter response for 44.1 DEM 9 kHz sample rates DS566F1 SDIN 20 1 SCLK 19 2 LRCK GND RST 10 11 Pin Description CS4351 VL AMUTEC AOUTA VA_H GND AOUTB BMUTEC VQ VBIAS VA 5 ...
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... T A Symbol High Voltage Analog power V A_H Low Voltage Analog power V A Digital power V D Interface power Digital Interface V IN stg CS4351 = 25 °C, VA_H = 3 Min Typ Max Units 8.55 12 12.6 3.13 3.3 3.47 3.13 3.3 3.47 1.7 3.3 3. Min Max -0 ...
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... Notes: 1. One-half LSB of triangular PDF dither is added to data. DS566F1 Symbol Min 24-bit unweighted 99 A-Weighted 102 16-bit unweighted A-Weighted (Note 1) THD+N 24-bit 0 dB -20 dB -60 dB 16-bit 0 dB - kHz) 1. OUTmax I Qmax Z OUT CS4351 Typ Max 109 - 112 - - -100 -90 - -89 -79 - -49 - 109 - - 100 - 2 ...
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... Min to -0.01 dB corner corner 0 -0.01 0.547 (Note 4) 102 - 9.4/ kHz - Fs = 44.1 kHz - kHz - to -0.01 dB corner corner 0 -0.01 .583 (Note 4.6/ -0.01 dB corner corner 0 -0.01 .635 (Note 4.7/ CS4351 Typ Max Unit - .454 Fs - .499 Fs - +0. ±0.56/ ±0. ±0. ±0. .430 Fs - .499 Fs - 0.01 ...
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... kHz - Fs = 44.1 kHz - kHz - to -0.01 dB corner corner 0 -0.01 .792 (Note 3.9/ -0.01 dB corner corner 0 -0.01 .868 (Note 4.2/Fs - “Digital Filter Response Plots” on CS4351 Typ Max Unit - 0.417 Fs - 0.499 Fs - +0. ±0.14/ ±0. ±0. ±0. .296 Fs - .499 ...
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... SCLK rising to SDIN hold time LRCK SCLK SDATA 10 Symbol Single-Speed Mode Double-Speed Mode Single-Speed Mode Double-Speed Mode Single-Speed Mode Double-Speed Mode Quad-Speed Mode t slrs t slrd t sclkl t t sdh sdlrs Figure 1. Serial Input Timing CS4351 Min Max 1.024 51 100 Fs 100 200 100 Fs 170 ...
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... L Symbol f scl t irs t buf t hdst t low t high t sust (Note 7) t hdd t sud susp t ack t high t sud t ack hdd Figure 2. Control Port Timing - I²C Format CS4351 Min Max - 100 500 - 4.7 - 4.0 - 4.7 - 4 250 - - 300 fc 4.7 - 300 1000 , of SCL ate ...
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... CDIN Figure 3. Control Port Timing - SPI Format (Write pF) L Symbol f sclk t srs (Note 8) t spi t csh t css t scl t sch t dsu (Note (Note 10 (Note 10 css t scl t sch dsu t dh CS4351 FORMAT ™ Min Max Unit - 6 MHz 500 - ns 500 - ns 1.0 - µ 100 ns - 100 all other times ...
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... Symbol normal operation A_H A_H A_H A_H 3 3 (Note 12 3 (Note 13) (Note 11) normal operation power-down (Note 13) normal operation power-down (Note 13) (1 kHz) PSRR (60 Hz) CS4351 Min Typ Max 2 1 0.65• 0 0 0.33• ± VA_H - - 0 - Min Typ Max - ...
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... AOUTB + 3.3 µF 10k Ω 3.3 µF + GND GND 6 16 Figure 4. Typical Connection Diagram CS4351 +3.3 V 3.3 µ +12 V Optional Mute Circuit 576 k Ω 412 k Ω 2.2 nF* Optional Mute Circuit 576 k Ω 412 k Ω 2.2 nF* *Shown value is for fc=130kHz ...
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... The device operates in one of three operational modes. The allowed sample rate range in each mode will depend on whether the Auto-Detect Defeat bit is enabled/disabled. 4.1.1 Auto-Detect Enabled The Auto-Detect feature is enabled by default. In this state, the CS4351 will auto-detect the correct mode when the input sample rate (F in Table 1 ...
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... Denotes clock modes which are NOT auto detected Figures 5 through 7. For all formats, SDIN is valid on the rising DESCRIPTION 24-bit Data Left Justified 24-bit Data Right Justified, 24-bit Data Right Justified, 16-bit Data CS4351 768x 1024x 1152x 24.5760 32.7680 36.8640 33.8688 45.1584 36.8640 49 ...
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... Figure 6. I² 24-Bit Data - LSB Figure 7. Right-Justified Data Figure 8 shows the de-emphasis curve for F Gain dB T1=50 µs 0dB F1 F2 3.183 kHz 10.61 kHz Figure 8. De-Emphasis Curve CS4351 nnel + LSB R ight C ha nnel + LSB R ight Cha nnel + MSB equal to 44 µs ...
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... Popguard Transient Control The CS4351 uses a novel technique to minimize the effects of output transients during power-up and power- down. This technology, when used with external DC-blocking capacitors in series with the audio outputs, minimizes the audio transients commonly produced by single-ended single-supply converters activated inside the DAC when the RST pin is toggled and requires no other external control, aside from choosing the appropriate DC-blocking capacitors ...
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... VA_H, VA, VD, and VL connected to clean supplies. If the ground planes are split between digital ground and analog ground, the GND pins of the CS4351 should be connected to the analog ground plane. All signals, especially clocks, should be kept away from the VBIAS and VQ pins in order to avoid unwanted coupling into the DAC ...
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... START condition and follow the procedure detailed from step further writes to oth- er registers are desired, initiate a STOP condition to the bus. 20 Figure 9 for the clock to data relationship). There pin. Pin AD0 en- Section 4.9.1) is set to 1, repeat the previous step until all the desired registers CS4351 Section 6). The operation of the control DS566F1 ...
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... Write to the memory address pointer, MAP. This byte points to the register to be written. DS566F1 Section 4.10. I²C read is the first operation performed on NOTE DATA 100110 AD0 R/W ACK ACK 1-8 Figure 9. Control Port Timing, I²C Mode CS4351 DATA ACK 1-8 Stop 21 ...
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... Default = ‘0000’ 22 Section 4.9.1) is set to 1, repeat the previous step until all the desired registers CHIP MAP ADDRESS 1001100 M SB R/W byte ory Address Pointer Figure 10. Control Port Timing, SPI mode Reserved MAP3 CS4351 DATA LSB byte MAP2 MAP1 MAP0 DS566F1 ...
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... DIF1 DIF0 INVERTA INVERTB Reserved Reserved MUTEC MUTE_A A VOL6 VOL5 VOL4 VOL6 VOL5 VOL4 SZC0 RMP_UP RMP_DN CPEN FREEZE Reserved CS4351 PART0 REV2 REV1 DEM1 DEM0 FM1 ATAPI3 ATAPI2 ATAPI1 MUTE_B Reserved Reserved Reserved VOL3 VOL2 VOL1 VOL3 VOL2 VOL1 Reserved ...
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... Left Justified 24-bit data 24-bit data Right Justified, 16-bit data Right Justified, 24-bit data Right Justified, 20-bit data Right Justified, 18-bit data Reserved Reserved Table 7. Digital Interface Formats . -10dB Figure 11.) CS4351 2 1 REV2 REV1 - - 2 1 DEM0 FM1 0 0 Format FIGURE (Default) ...
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... When set to 1, this bit inverts the signal polarity of channel A. When set to 0 (default), this function is disabled. 6.3.3 Invert Signal Polarity (Invert_B) Bit 5 Function: When set to 1, this bit inverts the signal polarity of channel B. When set to 0 (default), this function is disabled. DS566F1 Reserved ATAPI3 CS4351 ATAPI2 ATAPI1 ATAPI0 ...
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... ATAPI Channel Mixing and Muting (ATAPI3:0) Bits 3-0 Default = 1001 - AOUTA=aL, AOUTB=bR (Stereo) Function: The CS4351 implements the channel mixing functions of the ATAPI CD-ROM specification. Refer to Table 8 and Figure 12 for additional information. Left Channel Audio Data Right Channel Audio Data ...
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... When set to 0 (default), this function is disabled. 6.5 Channel A Volume Control - Register 05h Channel B Volume Control - Register 06h 7 6 VOL7 VOL6 VOL5 0 0 DS566F1 MUTE_A MUTE_B VOL4 VOL3 CS4351 Reserved Reserved Reserved VOL2 VOL1 VOL0 ...
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... Decimal Value 255 Table 9. Example Digital Volume Settings RMP_DN Reserved Description Immediate Change Zero Cross Soft Ramp Soft Ramp on Zero Crossings CS4351 Table 9. The volume changes are imple- Volume Setting 0 dB -0.5 dB -3.0 dB -127 FILT_SEL Reserved Reserved 0 0 DS566F1 0 1 ...
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... The specifications for each filter can be found in the sponse” section on page 6.7 Misc Control - Register 08h 7 6 PDN CPEN FREEZE 1 0 DS566F1 “Combined Interpolation & On-Chip Analog Filter Re- 8, and response plots can be found Reserved Reserved CS4351 Figures Reserved Reserved Reserved ...
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... When set to 1, this function allows modifications to be made to the registers without the changes taking effect until FREEZE is set back make multiple changes in the Control Port registers take effect simultaneously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit. When set to 0 (default), register changes take effect immediately. 30 CS4351 DS566F1 ...
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... Figure 16. Single-Speed (fast) Passband Ripple 0 −20 −40 −60 −80 −100 −120 0.8 0.9 1 0.4 0.42 Figure 18. Single-Speed (slow) Transition Band CS4351 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) 0 ...
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... Figure 22. Double-Speed (fast) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 0.05 Figure 24. Double-Speed (fast) Passband Ripple CS4351 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) 0.44 0.46 0.48 0.5 0.52 0.54 0.56 ...
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... Figure 28. Double-Speed (slow) Passband Ripple 100 120 0.7 0.8 0.9 1 0.2 Figure 30. Quad-Speed (fast) Transition Band CS4351 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 Frequency(normalized to Fs) 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0 ...
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... Figure 34. Quad-Speed (slow) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 0.02 Figure 36. Quad-Speed (slow) Passband Ripple CS4351 0.05 0.1 0.15 0.2 0.25 Frequency(normalized to Fs) 0.3 0.4 0.5 0.6 0.7 0.8 Frequency(normalized to Fs) 0.04 0.06 0.08 ...
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... The deviation from the nominal full scale analog output for a full scale digital input. Gain Drift The change in gain value with temperature. Units in ppm/°C. Intra-Channel Phase Deviation The deviation from linear phase within a given channel. Inter-Channel Phase Deviation The difference in phase between channels. DS566F1 CS4351 35 ...
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... JEDEC #: MO-153 Controlling Dimension is Millimeters. Symbol θ 20L TSSOP JA CS4351 1 E1 END VIEW L MILLIMETERS NOTE NOM MAX -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 2,3 6.50 6.60 1 6.40 6 ...
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... Package Pb-Free Grade Commercial 20-pin YES TSSOP Automotive - - Changes page 10. page 12. page 13. page 7 Table 10. Revision History CS4351 Temp Range Container Order # Rail CS4351-CZZ -10° to +70° C Tape & Reel CS4351-CZZR Rail CS4351-DZZ -40° to +85° C Tape & Reel CS4351-DZZR - - CDB4351 page 7. 37 ...