CS8415A-CZ Cirrus Logic Inc, CS8415A-CZ Datasheet - Page 2

• Manufacturer Part Number: CS8415A-CZ
• Description: Receiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8415A-CZ

• Driver Case Style: TSSOP
• No. Of Pins: 28
• Mounting Type: Surface Mount
• No. Of Channels: 7
• Peak Reflow Compatible (260 C): No
• Supply Voltage: 5V
• Supply Voltage Max: 5V
• Leaded Process Compatible: No
• Interface Type: Serial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TABLE OF CONTENTS
2
Contacting Cirrus Logic Support
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http://www.cirrus.com/corporate/contacts/
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of
this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-
marks and service marks can be found at http://www.cirrus.com.
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4
2. TYPICAL CONNECTION DIAGRAM ........................................................................................ 9
3. GENERAL DESCRIPTION ..................................................................................................... 10
4. SERIAL AUDIO OUTPUT PORT ............................................................................................ 10
5. AES3 RECEIVER .................................................................................................................... 13
6. CONTROL PORT DESCRIPTION AND TIMING .................................................................... 17
7. CONTROL PORT REGISTER SUMMARY ............................................................................. 20
8. CONTROL PORT REGISTER BIT DEFINITIONS .................................................................. 21
POWER AND THERMAL CHARACTERISTICS....................................................................... 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4
DIGITAL CHARACTERISTICS ................................................................................................. 5
SWITCHING CHARACTERISTICS .......................................................................................... 5
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS................................................. 6
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE...................................... 7
SWITCHING CHARACTERISTICS - CONTROL PORT - TWO-WIRE MODE......................... 8
3.1 AES3 and S/PDIF Standards Documents ........................................................................ 10
3.2 PLL Applications Note ...................................................................................................... 10
5.1 7:1 S/PDIF Input Multiplexer ............................................................................................ 13
5.2 PLL, Jitter Attenuation, and Varispeed ............................................................................ 13
5.3 Error Reporting and Hold Function .................................................................................. 14
5.4 Channel Status Data Handling ......................................................................................... 15
5.5 User Data Handling .......................................................................................................... 15
5.6 Mono Mode Operation ..................................................................................................... 16
6.1 SPI Mode ......................................................................................................................... 17
6.2 Two-Wire Mode ................................................................................................................ 18
6.3 Interrupts .......................................................................................................................... 18
7.1 Memory Address Pointer (MAP) ....................................................................................... 20
8.1 Control 1(1h) ..................................................................................................................... 21
8.2 Control 2 (2h) .................................................................................................................... 21
8.3 Clock Source Control (4h)................................................................................................. 22
8.4 Serial Audio Output Port Data Format (6h)....................................................................... 22
8.5 Interrupt 1 Status (7h) (Read Only)................................................................................... 23
8.6 Interrupt 2 Status (8h) (Read Only)................................................................................... 24
8.7 Interrupt 1 Mask (9h)......................................................................................................... 24
8.8 Interrupt 1 Mode MSB (Ah) and Interrupt 1 Mode LSB(Bh) .............................................. 24
8.9 Interrupt 2 Mask (Ch) ........................................................................................................ 25
8.10 Interrupt 2 Mode MSB (Dh) and Interrupt 2 Mode LSB(Eh)............................................ 25
8.11 Receiver Channel Status (Fh) (Read Only) .................................................................... 25
8.12 Receiver Error (10h) (Read Only) ................................................................................... 27
5.2.1 OMCK System Clock Mode ................................................................................ 13
5.2.2 PLL External Components .................................................................................. 13
5.5.1 Non-Audio Auto-Detection .................................................................................. 15
CS8415A
DS470PP3