CY7C025AV-25AC Cypress Semiconductor Corp, CY7C025AV-25AC Datasheet
CY7C025AV-25AC
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CY7C025AV-25AC Summary of contents
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... BUSY is an output in master mode and an input in slave mode. Cypress Semiconductor Corporation Document #: 38-06052 Rev. *H CY7C0241AV/0251AV/036AV • Automatic power-down • Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device • On-chip arbitration logic • ...
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... I/O 13L 8 GND 9 I/O 10 14L I/O 11 15L GND Notes the CY7C025AV. 12L the CY7C025AV. 12R Document #: 38-06052 Rev. *H 100-Pin TQFP Top View 100 CY7C024AV (4K × 16) CY7C025AV (8K × 16 CY7C024AV/025AV/026AV CY7C0241AV/0251AV/036AV INT 65 L BUSY 64 L GND 63 M/S 62 BUSY 61 R INT ...
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Pin Configurations (continued) 100 I I/O 4 17L I/O 11L 5 I/O 6 12L I/O 13L 7 I/O 14L 8 GND 9 I/O 10 15L I/O 11 16L GND ...
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Pin Configurations (continued I/O 8L I/O 17L I/O 11L I/O 12L I/O 13L I/O 14L GND I/O 15L I/O 16L V CC GND I/O 0R I I/O 3R I/O 4R I/O 5R I/O ...
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... SEM pin must be asserted instead of the CE pin, and communications OE must also be asserted. Interrupts The upper two memory locations may be used for message passing. The highest memory location (FFF for the CY7C024AV/41AV, 1FFF for the CY7C025AV/51AV, 3FFF for CY7C024AV/025AV/026AV –A for 8K devices; A –A for 16K). ...
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... CY7C026AV/36AV) is the mailbox for the right port and the second-highest memory location (FFE for the CY7C024AV/ 41AV, 1FFE for the CY7C025AV/51AV, 3FFE for the CY7C026AV/36AV) is the mailbox for the left port. When one port writes to the other port’s mailbox, an interrupt is generated to the owner ...
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Table 1. Non-Contending Read/Write Inputs CE R ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ............... –0.5V to +4.6V ...
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AC Test Loads and Waveforms 3. 590Ω OUTPUT 435Ω (a) Normal Load (Load 1) Switching Characteristics Over the Operating Range Parameter Read Cycle t Read Cycle Time RC t Address to Data ...
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Switching Characteristics Over the Operating Range (continued) Parameter t Data Set-up to Write End SD t Data Hold From Write End HD [22, 23] t R/W LOW to High Z HZWE [22, 23] t R/W HIGH to Low Z LZWE ...
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Switching Waveforms Read Cycle No. 1 (Either Port Address Access) ADDRESS t OHA DATA OUT PREVIOUS DATA VALID Read Cycle No. 2 (Either Port CE/OE Access) CE and DATA OUT I CC CURRENT I SB [28, ...
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Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [37, 38 R/W NOTE 40 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [37, 38 R/W DATA IN ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS 0 2 SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A – ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 46 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No.1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No.2 (Address Arbitration) Left ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE 1FFF (OR 1/3FFF R/W L INT R t INS Right Side Clears INT : R ADDRESS R ...
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... CY7C024AV-20AXC CY7C024AV-20AI CY7C024AV-20AXI 25 CY7C024AV-25AC CY7C024AV-25AXC CY7C024AV-25AI CY7C024AV-25AXI 8K x16 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C025AV-20AC CY7C025AV-20AXC CY7C025AV-20AXI 25 CY7C025AV-25AC CY7C025AV-25AXC CY7C025AV-25AI CY7C025AV-25AXI 16K x16 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C026AV-20AC CY7C026AV-20AXC CY7C026AV-20AXI 25 CY7C026AV-25AC CY7C026AV-25AXC CY7C026AV-25AI CY7C026AV-25AXI 4K x18 3.3V Asynchronous Dual-Port SRAM ...
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... Document #: 38-06052 Rev. *H © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...
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... Document History Page Document Title: CY7C024AV/CY7C025AV/CY7C026AV/CY7C0241AV/CY7C0251AV/CY7C036AV 3.3V 4K/8K/16K x 16/18 Dual Port Static RAM Document Number: 38-06052 REV. ECN NO. Issue Date ** 110204 11/11/01 *A 122302 12/27/02 *B 128958 9/03/03 *C 237622 See ECN *D 241968 See ECN *E 276451 See ECN *F 279452 See ECN *G 373580 See ECN ...