CY7C0853V-133BBC Cypress Semiconductor Corp, CY7C0853V-133BBC Datasheet

IC,SYNC SRAM,256KX36,CMOS,BGA,172PIN,PLASTIC

CY7C0853V-133BBC

Manufacturer Part Number
CY7C0853V-133BBC
Description
IC,SYNC SRAM,256KX36,CMOS,BGA,172PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp

Specifications of CY7C0853V-133BBC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
9M (256K x 36)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Package / Case
172-LFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C0853V-133BBC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C0853V-133BBC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-06070 Rev. *D
Features
• True dual-ported memory cells that allow simultaneous
• Synchronous pipelined operation
• Organization of 1-Mbit, 2-Mbit, 4-Mbit and 9-Mbit
• Pipelined output mode allows fast operation
• 0.18-micron CMOS for optimum speed and power
• High-speed clock to data access
• 3.3V low power
• Mailbox function for message passing
• Global master reset
• Separate byte enables on both ports
• Commercial and industrial temperature ranges
• IEEE 1149.1-compatible JTAG boundary scan
• 172-ball FBGA (1 mm pitch) (15 mm × 15 mm)
• 176-pin TQFP (24 mm × 24 mm × 1.4 mm)
• Counter wrap around control
• Counter readback on address lines
• Mask register readback on address lines
• Dual Chip Enables on both ports for easy depth
Table 1. Product Selection Guide
Density
Part Number
Max. Speed (MHz)
Max. Access Time - clock to Data (ns)
Typical operating current (mA)
Package
access of the same memory location
devices
expansion
— Active as low as 225 mA (typ)
— Standby as low as 55 mA (typ)
— Internal mask register controls counter wrap-around
— Counter-interrupt flags to indicate wrap-around
— Memory block retransmit operation
FLEx36
3901 North First Street
CY7C0850V
(32K x 36)
172FBGA
176TQFP
1-Mbit
167
225
4.0
TM
Functional Description
The FLEx36 family includes 1M, 2M, 4M and 9M pipelined,
synchronous, true dual-port static RAMs that are high-speed,
low-power 3.3V CMOS. Two ports are provided, permitting
independent, simultaneous access to any location in memory.
The result of writing to the same location by more than one port
at the same time is undefined. Registers on control, address,
and data lines allow for minimal set-up and hold time.
During a Read operation, data is registered for decreased
cycle time. Each port contains a burst counter on the input
address register. After externally loading the counter with the
initial address, the counter will increment the address inter-
nally (more details to follow). The internal Write pulse width is
independent of the duration of the R/W input signal. The
internal Write pulse is self-timed to allow the shortest possible
cycle times.
A HIGH on CE0 or LOW on CE1 for one clock cycle will power
down the internal circuitry to reduce the static power
consumption. One cycle with chip enables asserted is required
to reactivate the outputs.
Additional features include: readback of burst-counter internal
address value on address lines, counter-mask registers to
control the counter wrap-around, counter interrupt (CNTINT)
flags, readback of mask register value on address lines,
retransmit functionality, interrupt flags for message passing,
JTAG for boundary scan, and asynchronous Master Reset
(MRST).
The CY7C0853 device in this family has limited features.
Please see See “Address Counter and Mask Register
Operations
3.3V 32K/64K/128K/256K x 36
Synchronous Dual-Port RAM
CY7C0851V
(64K x 36)
172FBGA
176TQFP
[10]
2-Mbit
167
225
4.0
” on page 8. for details.
San Jose
CY7C0850V/CY7C0851V
CY7C0852V/CY7C0853V
,
CA 95134
CY7C0852V
(128K x 36)
172FBGA
176TQFP
4-Mbit
167
225
4.0
Revised June 24, 2004
408-943-2600
CY7C0853V
(256K x 36)
172FBGA
9-Mbit
133
270
4.7

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