CY7C1514V18-167BZXC Cypress Semiconductor Corp, CY7C1514V18-167BZXC Datasheet - Page 29
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CY7C1514V18-167BZXC
Manufacturer Part Number
CY7C1514V18-167BZXC
Description
CY7C1514V18-167BZXC
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1512V18-167BZXC.pdf
(29 pages)
Specifications of CY7C1514V18-167BZXC
Format - Memory
RAM
Memory Type
SRAM - Synchronous, QDR II
Memory Size
72M (2M x 36)
Speed
167MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1514V18-167BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document History Page
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at
Products
PSoC
Clocks & Buffers
Wireless
Memories
Image Sensors
© Cypress Semiconductor Corporation, 2004-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 38-05489 Rev. *F
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, Hitachi, IDT, NEC, and Samsung. All product and company names mentioned in this document are
the trademarks of their respective holders.
Document Title: CY7C1510V18/CY7C1525V18/CY7C1512V18/CY7C1514V18, 72-Mbit QDR™-II SRAM 2-Word
Burst Architecture
Document Number: 38-05489
*D
*E
*F
2511080
2549270
467290
See ECN
See ECN VKN/AESA Updated Logic Block diagram , Updated Power-up sequence waveform and it’s
08/06/08
cypress.com/sales.
PYRS
NXR
wireless.cypress.com
memory.cypress.com
clocks.cypress.com
image.cypress.com
psoc.cypress.com
Modified the ZQ Definition from Alternately, this pin can be connected directly to V
to Alternately, this pin can be connected directly to V
Included Maximum Ratings for Supply Voltage on V
Changed the Maximum Ratings for DC Input Voltage from V
Changed t
t
to 5 ns and changed t
table .Modified Power-Up waveform
Added additional notes in the AC parameter section
Changed the t
from 0.6 ns to 0.4 ns for 200 MHz, and from 0.7 ns to 0.5 ns for 167 MHz.
Modified AC Switching Waveform, Corrected the typo In the AC Switching Character-
istics Table, Updated the Ordering Information Table
description, Updated I
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed t
Changed Θ
Publish in External Web
TH
and t
TL
TCYC
CYC
from 40 ns to 20 ns, changed t
JA
SC
spec from 16.2 to 16.3, Changed Θ
max spec to 8.4ns for all speed bins, Modified footnotes 21 and 28,
Revised August 06, 2008
from 100 ns to 50 ns, changed t
and t
TDOV
DD
PSoC Solutions
General
Low Power/Low Voltage
Precision Analog
LCD Drive
CAN 2.0b
USB
HC
/I
value from 0.5 ns to 0.35 ns for 250 MHz ,
SB
from 20 ns to 10 ns in TAP AC Switching Characteristics
specs, Added footnote #19 related to I
CY7C1510V18, CY7C1525V18
CY7C1512V18, CY7C1514V18
TMSS
, t
psoc.cypress.com/precision-analog
TF
TDIS
JC
from 10 MHz to 20 MHz, changed
DDQ
, t
spec from 2.3 to 2.1
DDQ
psoc.cypress.com/low-power
CS
psoc.cypress.com/solutions
psoc.cypress.com/lcd-drive
Relative to GND
, t
TMSH
DDQ
psoc.cypress.com/can
psoc.cypress.com/usb
, t
to V
TDIH
DD
DD
, t
,
CH
Page 29 of 29
from 10 ns
DD
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