CY7C4271-15AXC Cypress Semiconductor Corp, CY7C4271-15AXC Datasheet - Page 12

• Manufacturer Part Number: CY7C4271-15AXC
• Description: CY7C4271-15AXC
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4271-15AXC

• Function: Synchronous
• Memory Size: 288K (32K x 9)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Document Number: 38-06015 Rev. *G
Notes
21. When t
22. t
t
the rising edge of RCLK and the rising edge of WCLK is less than t
(if applicable)
(if applicable)
SKEW1
SKEW1
WEN2
WEN2
Q
D
WCLK
REN1,
D
WEN1
RCLK
REN2
WEN1
REN1,
0
0
WCLK
. The Latency Timing applies only at the Empty Boundary (EF = LOW).
REN2
SKEW1
0
RCLK
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF goes HIGH during the current clock cycle. If the time between
–Q
–D
OE
–D
OE
FF
EF
8
8
8
> minimum specification, t
LOW
t
DS
DATA IN OUTPUT REGISTER
t
LOW
SKEW1
t
t
ENS
ENS
[22]
DATA WRITE 1
t
ENS
NO WRITE
t
(continued)
SKEW1
t
t
ENH
ENH
FRL
t
FRL
(maximum) = t
t
WFF
[21]
t
t
A
ENH
CLK
Figure 10. Empty Flag Timing
Figure 11. Full Flag Timing
+ t
t
REF
SKEW2
SKEW1
t
DS
. When t
, then FF may not change state until the next WCLK rising edge.
SKEW2
DATA WRITE
t
A
< minimum specification, t
t
REF
DATA READ
t
DS
t
WFF
t
t
ENS
ENS
t
SKEW1
DATA WRITE 2
t
[22]
ENS
FRL
t
NO WRITE
SKEW1
t
t
ENH
ENH
(maximum) = either 2 × t
CY7C4261, CY7C4271
t
FRL
t
[21]
WFF
t
t
A
ENH
NEXT DATA READ
t
CLK
REF
DATA WRITE
+ t
Page 12 of 21
SKEW1
or t
CLK
+
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