CY7C68013A-56LTXCT Cypress Semiconductor Corp, CY7C68013A-56LTXCT Datasheet - Page 47
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CY7C68013A-56LTXCT
Manufacturer Part Number
CY7C68013A-56LTXCT
Description
CY7C68013A-56LTXCT
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r
Specifications of CY7C68013A-56LTXCT
Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Processor Series
CY7C68xx
Core
8051
Development Tools By Supplier
CY3684
Package
56QFN EP
Device Core
8051
Family Name
FX2LP
Maximum Speed
48 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/USART/USB
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
Details
9.10 Slave FIFO Asynchronous Write
Table 24. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK
9.11 Slave FIFO Synchronous Packet End Strobe
Table 25. Slave FIFO Synchronous Packet End Strobe Parameters with Internally Sourced IFCLK
Table 26. Slave FIFO Synchronous Packet End Strobe Parameters with Externally Sourced IFCLK
Document #: 38-08032 Rev. *U
t
t
t
t
t
t
t
t
t
t
t
t
t
WRpwl
WRpwh
SFD
FDH
XFD
IFCLK
SPE
PEH
XFLG
IFCLK
SPE
PEH
XFLG
Parameter
Parameter
Parameter
SLWR pulse LOW
SLWR pulse HIGH
SLWR to FIFO DATA setup time
FIFO DATA to SLWR hold time
SLWR to FLAGS output propagation delay
IFCLK period
PKTEND to clock setup time
Clock to PKTEND hold time
Clock to FLAGS output propagation delay
IFCLK period
PKTEND to clock setup time
Clock to PKTEND hold time
Clock to FLAGS output propagation delay
Figure 9-11. Slave FIFO Synchronous Packet End Strobe Timing Diagram
SLWR/SLCS#
Figure 9-10. Slave FIFO Asynchronous Write Timing Diagram
PKTEND
FLAGS
DATA
FLAGS
SLWR
IFCLK
Description
Description
Description
t
WRpwl
t
SFD
t
XFD
t
FDH
t
SPE
t
WRpwh
t
t
PEH
XFLG
20.83
20.83
14.6
Min
Min
Min
8.6
2.5
50
70
10
10
–
0
–
–
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
[23]
[20]
Max
Max
Max
13.5
200
9.5
70
–
–
–
–
–
–
–
–
–
[20]
[21]
[21]
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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