CY8CTST200A-48PVXIT Cypress Semiconductor Corp, CY8CTST200A-48PVXIT Datasheet - Page 86
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CY8CTST200A-48PVXIT
Manufacturer Part Number
CY8CTST200A-48PVXIT
Description
CY8CTST200A-48PVXIT
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200A-48PVXIT
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Processor Series
CY8CTxx2xxA
Core
M8C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The circuit operates by alternately charging the sense
capacitance to the internal voltage buffer level (first phase),
then on the opposite phase of the clock (second phase), the
analog global bus is connected to the integration capacitor
while the voltage buffer is disconnected. (See
This builds up voltage on the integration capacitor, and
eventually it trips the monitoring comparator. The compara-
tor is configured to capture the number of counts of the inter-
nal oscillator during the charging interval, yielding a
capacitance measurement of the sense pin.
Figure 11-3. Charging the TrueTouch and Connection
TrueTouch Module
86
Vr
Vr
Comparator
Comparator
Reference
Reference
Buffer
First Phase: Charging the Sense Capacitor CS1
Buffer
Second Phase: Integrating Charge onto
Open
CSCLK
Closed
CSCLK
Mux
Mux
Mux
Mux
Integration Capacitor
Vref
Vref
Pin Enables
Pin Enables
Open
Closed
Closed
Closed
CSCLK
CSCLK
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Figure
C
CS1
CS2
CSN
CS1
CS2
CSN
C
EXTERNAL
P0[1]
P0[3]
EXTERNAL
P0[1]
P0[3]
or
11-3.)
or
11.1.1.2
The relaxation oscillator (RO) method operates by forming
an oscillator using the sense capacitance. The IDAC, sense
capacitance, and comparator (switching between two refer-
ences) form the RO. There are two RO methods of capsens-
ing supported.
In the first method, the RO is compared to the frequency of a
similar internal oscillator. Normally, the relaxation oscillator
is initially tuned (through firmware) to match the internal
oscillator or to match a submultiple of the internal oscillator.
The frequency difference is measured by defining an interval
of internal oscillator clocks and counting the number of RO
periods that occur during this interval. (See
Two 8-bit counters are used: one clocked by the internal
oscillator and one clocked by the relaxation oscillator.
With the RO frequency closely matched to the internal oscil-
lator and the interval set to 256 clocks, the 8-bit RO count
result is the difference between the two oscillators. An over-
flow bit is available to test whether the number of capture
counts is greater than or less than 256. Other count intervals
are available. (See
Figure 11-4. Relaxation Oscillator #1 Block Diagram
In the second RO method, the interval is set by a number of
cycles of the RO using a 6-bit counter. During this interval,
the IMO clocks a 16-bit counter and the final count gives a
measure of capacitance. (See
RO Clock
IMO
IDAC
Comparator
Relaxation Oscillator
Clock Select
TrueTouch
Figure
Mux
Mux
11-13.)
CSCLK
Refs
Figure
Pin Enables
TrueTouch Logic
11-5.)
8-Bit Counter
8-Bit Counter
Figure
CS1
CS2
CSN
11-4.)
[+] Feedback
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