DSPIC30F2010-20E/SO Microchip Technology, DSPIC30F2010-20E/SO Datasheet - Page 7

• Manufacturer Part Number: DSPIC30F2010-20E/SO
• Description: IC,DSP,16-BIT,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20E/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4. Module: PSV Operations
TABLE 3:
EXAMPLE 4:
© 2010 Microchip Technology Inc.
ADDC
SUBB
SUBBR
CPB
RLC
RRC
ADD(Accumulator-based)
LAC
Note 1:
When one of the operands of instructions shown in
Table 3
Program Space Visibility (PSV), the STATUS
register, SR and/or the results may be corrupted.
Work arounds
Work around 1: For Assembly Language
Source Code
To work around the erratum in the MPLAB ASM30
assembler, the application may perform a PSV
access to move the source operand from program
memory to RAM or a W register prior to performing
the operations listed in
for
.include “p30fxxxx.inc”
.......
MOV.B
MOV.B
BSET
....
MOV
ADD
ADDC
2:
3:
4:
Example 4
Refer to the “dsPIC30F/33F Programmer’s Reference Manual” (DS70157) for details on the dsPIC30F
Instruction set.
The errata only affects these instructions when a PSV access is performed to fetch one of the source
operands in the instruction. A PSV access is performed when the Effective Address of the source operand
is greater than 0x8000 and the PSV bit (CORCON<2>) is set to ‘1’. In the examples shown, the data
access from program memory is made via the W1 register.
SR<1:0> bits represent the Sticky Zero and Carry Status bits, respectively.
SR<15:10> bits represent the Accumulator Overflow and Saturation Status bits.
Instruction
is fetched from program memory using
#0x00, W0
WREG, PSVPAG
CORCON, #PSV;Enable PSV
#0x8200, W1 ;Set up W1 for
W3, [W1++], W5 ;This instruction
W4, [W1++], W6 ;Carry flag and
AFFECTED INSTRUCTIONS
is demonstrated in
INCORRECT RESULTS
(1)
;Load PSVPAG register
;indirect PSV access
;from 0x000200
Table
;works ok
;W6 gets
;corrupted here!
3. The work around
Example
ADDC W0, [W1++], W2 ;
SUBB.b W0, [++W1], W3 ;
SUBBR.b W0, [++W1], W3 ;
CPB W0, [W1++], W4 ;
RLC [W1], W4 ;
RRC [W1], W2 ;
ADD [W1++], A ;
LAC [W1], A ;
Examples of Incorrect Operation
5.
EXAMPLE 5:
These instructions are identified in
Example 4
occurs.
Also, always use Work around 2 if the C compiler
is used to generate code for dsPIC30F2010
devices.
Work around 2: For C Language Source Code
For applications using C language, MPLAB C Com-
piler for dsPIC
MPLAB C30 C Compiler), versions 1.20.04 or
higher, provides the following command-line switch
that implements a work around for the erratum.
Refer to the “readme.txt” file in the MPLAB C
Compiler for dsPIC DSCs for further details.
Affected Silicon Revisions
.include “p30fxxxx.inc”
.......
MOV.B
MOV.B
BSET
....
MOV
ADD
MOV
ADDC
A0
X
(2)
A1
X
-merrata=psv
#0x00, w0
WREG, PSVPAG
CORCON, #PSV;Enable PSV
#0x8200, W1 ;Set up W1 for
W3, [W1++], W5 ;This instruction
[W1++], W2 ;Load W2 with data
W4, W2, W6 ;Carry flag and W4
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<15:10> bits
demonstrates a scenario where this
dsPIC30F2010
A2
X
CORRECT RESULTS
®
DSCs (formerly known as the
Data Corruption IN
A3
X
;Load PSVPAG register
;indirect PSV access
;from 0x000200
;from program memory
;results are okay!
(3)
(3)
(3)
(3)
(3)
(3)
(3)
, Result in W2
, Result in W3
, Result in W3
, Result in W4
, Result in W2
A4
(4)
X
;works ok
DS80451E-page 7
Table
3.