DSPIC33FJ128GP804-H/PT Microchip Technology, DSPIC33FJ128GP804-H/PT Datasheet - Page 267

16-bit DSC, 128KB Flash, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRAY

DSPIC33FJ128GP804-H/PT

Manufacturer Part Number
DSPIC33FJ128GP804-H/PT
Description
16-bit DSC, 128KB Flash, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP804-H/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-TQFP
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 140 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
A/d Bit Size
10 bit
A/d Channels Available
13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128GP804-H/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 22-1:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-9
bit 8
bit 7
bit 6-0
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
DACEN
R/W-0
U-0
DACEN: DAC1 Enable bit
1 = Enables module
0 = Disables module
Unimplemented: Read as ‘0’
DACSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
AMPON: Enable Analog Output Amplifier in Sleep Mode/Stop in Idle Mode bit
1 = Analog Output Amplifier is enabled during Sleep Mode/Stop in Idle mode
0 = Analog Output Amplifier is disabled during Sleep Mode/Stop in Idle mode
Unimplemented: Read as ‘0’
FORM: Data Format Select bit
1 = Signed integer
0 = Unsigned integer
Unimplemented: Read as ‘0’
DACFDIV<6:0>: DAC Clock Divider bit
1111111 = Divide input clock by 128
0000101 = Divide input clock by 6 (default)
0000010 = Divide input clock by 3
0000001 = Divide input clock by 2
0000000 = Divide input clock by 1 (no divide)
R/W-0
U-0
DAC1CON: DAC CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
DACSIDL
R/W-0
R/W-0
AMPON
R/W-0
R/W-0
DACFDIV<6:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
R/W-1
U-0
x = Bit is unknown
R/W-0
U-0
DS70292E-page 267
FORM
R/W-0
R/W-1
bit 8
bit 0

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